DSMC法を用いたCVDステップカバレッジシミュレーションの高速化

概要

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This paper describes acceleration of the numerical simulation for chemical vapor deposition (CVD) step coverage problems. The CVD process is used to deposit thin films during LSI production. The thin film deposition process is generally simulated using a combination of the direct simulation Monte Carlo (DSMC) method and trench profile evolution, but much time is required to compute a trench filling shape when sticking probability is small. In the present work, reduction of the computation time was achieved by parallel processing using an engineering workstation (EWS) network system and stick-at-all-the-reflection-points (SARP) method which was newly developed. In the former case, more than 85% parallel efficiency on a 20-EWS system was achieved. In the latter case, computation was more than 780000 times faster than by the conventional method when an experimental poly-Si deposition process was considered.
社団法人日本機械学会の論文
1996-09-25