Dual Imager Core Chip with 24.8 Rangemaps/s 3-D and 58 fps 2-D Simultaneous Capture Capability

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概要

• 論文の詳細を見る
• 2009-06-01

著者

• Nakura Toru

  Univ. Tokyo Tokyo Jpn

• Ikeda Makoto

  Faculty Of Engineering And Vlsi Design And Education Center (vdec) The University Of Tokyo

• Ikeda Makoto

  The Vlsi Design And Education Center The University Of Tokyo

• Ikeda Makoto

  Dept. Of Engineering University Of Tokyo:vlsi Design And Education Center University Of Tokyo

• Asada K

  Dept. Of Engineering University Of Tokyo:vlsi Design And Education Center University Of Tokyo

• Asada K

  Department Of Electronic Engineering And Vlsi Design And Education Center (vdec) The University Of T

• Asada Kunihiro

  Faculty Of Engineering And Vlsi Design And Education Center (vdec) The University Of Tokyo

• Ikeda M

  Department Of Electonics Engineering Graduate School Of Engineering The University Of Tokyo

• MANDAI Shingo

  Faculty of Engineering, and VLSI Design and Education Center (VDEC), The University of Tokyo

• NAKURA Toru

  Faculty of Engineering, and VLSI Design and Education Center (VDEC), The University of Tokyo

• Asada K

  Department Of Electonics Engineering Graduate School Of Engineering The University Of Tokyo

• Mandai Shingo

  Dept. Of Electronic Engineering The University Of Tokyo

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