On-Chip Switched Parasitic Capacitors of Sleep Blocks for Resonant Supply Noise Reduction
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概要
- 論文の詳細を見る
- 2012-04-01
著者
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Nakura Toru
Univ. Tokyo Tokyo Jpn
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Ikeda Makoto
The Vlsi Design And Education Center The University Of Tokyo
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Ikeda Makoto
Dept. Of Engineering University Of Tokyo:vlsi Design And Education Center University Of Tokyo
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Asada K
Dept. Of Engineering University Of Tokyo:vlsi Design And Education Center University Of Tokyo
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Asada K
Department Of Electronic Engineering And Vlsi Design And Education Center (vdec) The University Of T
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Asada K
Department Of Electonics Engineering Graduate School Of Engineering The University Of Tokyo
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Kim Jinmyoung
Dept. Of Electrical Engineering And Information Systems The University Of Tokyo
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Takata Hidehiro
Design Platform Dev. Div. Renesas Electronics Corp.
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Ishibashi Koichiro
Design Platform Dev. Div. Renesas Electronics Corp.
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Ikeda Makoto
The Vlsi Design And Education Center (vdec) The University Of Tokyo
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Asada Kunihiro
The Vlsi Design And Education Center (vdec) The University Of Tokyo
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Nakura Toru
The Vlsi Design And Education Center (vdec) The University Of Tokyo
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KIM Jinmyoung
the Dept. of Electrical Engineering and Information Systems, The University of Tokyo
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ASADA Kunihiro
The VLSI chip in this study has been fabricated in the chip fabrication program of VLSI Design and Education Center (VDEC)
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