On-Chip Detector for Single-Event Noise Sensing with Voltage Scaling Function (Signal Integrity and Variability, <Special Section> VLSI Design Technology in the Sub-100nm Era)

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概要

• 論文の詳細を見る

• In this paper we present an on-chip noise detection circuit. In contrast with the previous works concerning on-chip noise measurement, this detector does not assume specific noise properties such as periodicity. The detector is able to continuously capture 10 nano-second time window from the measured signal with a resolution equal to 100 pico-second. The requested bandwidth of the output channel can be adjusted freely, therefore, the user can avoid the effect of on-chip parasites and the need to off-chip sophisticated monitoring tools. The detector is equipped with an on-chip programmable voltage divider, which enables measuring the high and low swing fluctuations accurately. Therefore, the detector is suitable to measure the non-periodic/single event noise for the purpose of reliability evaluation and performance modeling. The detector is implemented in a test chip using Hitachi 0.18μm technology.

• 社団法人電子情報通信学会の論文

著者

• Ikeda Makoto

  The Vlsi Design And Education Center The University Of Tokyo

• Abbas Mohamed

  The Dept. Of Electronic Engineering The University Of Tokyo

• Ikeda Makoto

  Dept. Of Engineering University Of Tokyo:vlsi Design And Education Center University Of Tokyo

• Asada K

  Dept. Of Engineering University Of Tokyo:vlsi Design And Education Center University Of Tokyo

• Asada K

  Department Of Electronic Engineering And Vlsi Design And Education Center (vdec) The University Of T

• Asada Kunihiro

  The Vlsi Design And Education Center The University Of Tokyo

• Ikeda M

  Department Of Electonics Engineering Graduate School Of Engineering The University Of Tokyo

• Asada K

  Department Of Electonics Engineering Graduate School Of Engineering The University Of Tokyo

• Ikeda Makoto

  The Vlsi Design And Education Center (vdec) The University Of Tokyo

• Asada Kunihiro

  The Vlsi Design And Education Center (vdec) The University Of Tokyo

• ASADA Kunihiro

  The VLSI chip in this study has been fabricated in the chip fabrication program of VLSI Design and Education Center (VDEC)

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