Yamashita Yoshimi | Fujitsu Laboratories Limited, 10-1 Morinosato-Wakamiya, Atsugi, Kanagawa 243-0197, Japan

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著作論文

Effect of flatness of heterointerfaces on device performance of InP-based HEMTs
Effect of Bottom SiN Thickness for AlGaN/GaN Metal-Insulator-Semiconductor High Electron Mobility Transistors Using SiN/SiO_2/SiN Triple-Layer Insulators
AlGaN/GaN MIS-HEMTs Fabricated Using SiN/SiO_2/SiN Triple-Layer Insulators
Fabrication Technology and Device Performance of Sub-50-nm-Gate InP-Based High Electron Mobility Transistors
High RF Performance of 50-nm-Gate Lattice-Matched InAlAs/InGaAs HEMTs (Joint Special Issue on Heterostructure Microelectronics with TWHM 2000)
High f_T 50-nm-Gate InAlAs/InGaAs High Electron Mobility Transistors Lattice-Matched to InP Substrates
DC and RF Performance of 50 nm Gate Pseudomorphic In_Ga_As/In_Al_As High Electron Mobility Transistors Grown on (411)A-Oriented InP Substrates by Molecular-Beam Epitaxy
High Performance AlGaN/GaN Metal–Insulator–Semiconductor High Electron Mobility Transistors Fabricated Using SiN/SiO2/SiN Triple-Layer Insulators
Effects of Heterointerface Flatness on Device Performance of InP-Based High Electron Mobility Transistor
InP-Based High Electron Mobility Transistors with a Very Short Gate-Channel Distance
Non-Recessed-Gate Enhancement-Mode AlGaN/GaN High Electron Mobility Transistors with High RF Performance
Suppression of Floating Body Effects in Polycrystalline Silicon Thin-Film Transistor by Schottky Source/Drain Structure
Effect of Bottom SiN Thickness for AlGaN/GaN Metal–Insulator–Semiconductor High Electron Mobility Transistors Using SiN/SiO2/SiN Triple-Layer Insulators

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