WATANABE Issei | National Institute of Info. & Com. Tech.
スポンサーリンク
概要
関連著者
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WATANABE Issei
National Institute of Info. & Com. Tech.
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MATSUI Toshiaki
National Institute of Info. & Com. Tech.
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Endoh Akira
National Inst. Of Information And Communications Technol. (nict) Koganei‐shi Jpn
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SHINOHARA Keisuke
National Institute of Info. & Com. Tech.
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MIMURA Takashi
National Institute of Information and Communications Technology
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ENDOH Akira
Fujitsu Laboratories Ltd.
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Endoh A
Fujitsu Lab. Ltd. Atsugi Jpn
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Yamashita Yoshimi
Fujitsu Laboratories Ltd.
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MIMURA Takashi
Fujitsu Laboratories Lid.
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KITADA Takahiro
Osaka University
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SHIMOMURA Satoshi
Osaka University
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HIYAMIZU Satoshi
Osaka University
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Matsui Toshiaki
Communications Research Laboratory Ministry Of Posts And Telecommunications
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Watanabe Issei
National Institute Of Information And Communications Technology (nict)
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Mimura Takashi
National Institute Of Information And Communications Technology (nict)
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Matsui Toshiaki
National Institute Of Information And Communications Technology (nict)
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Yamashita Yoshimi
Fujitsu Laboratories Limited, 10-1 Morinosato-Wakamiya, Atsugi, Kanagawa 243-0197, Japan
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Awano Yuji
Fujitsu Lab. Ltd. Kanagawa Jpn
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HIYAMIZU Satoshi
Graduate School of Engineering Science, Osaka University
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Shimomura S
Graduate School Of Science And Engineering Ehime University
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Shimomura Satoshi
Department Of Physical Science Graduate School Of Engineering Science Osaka University
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Hiyamizu S
Osaka Univ. Osaka Jpn
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Hiyamizu Satoshi
Graduate School Of Engineering Science Osaka University
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HIKOSAKA Kohki
Fujitsu Laboratories Ltd.
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Kitada Tadayoshi
Institute Of Technology And Science University Of Tokushima
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Shinohara K
National Institute Of Info. & Com. Tech.
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Mimura Takashi
National Institute of Information and Communications Technology (NICT), 4-2-1 Nukui-Kitamachi, Koganei, Tokyo 184-8795, Japan
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Mimura Takashi
National Institute of Information and Communications Technology, Koganei, Tokyo 184-8795, Japan
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Endoh Akira
National Institute of Information and Communications Technology, Koganei, Tokyo 184-8795, Japan
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Endoh Akira
National Institute of Information and Communications Technology (NICT), 4-2-1 Nukui-Kitamachi, Koganei, Tokyo 184-8795, Japan
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Endoh Akira
Fujitsu Laboratories Ltd., 10-1 Morinosato-Wakamiya, Atsugi, Kanagawa 243-0197, Japan
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Awano Yuji
Fujitsu Laboratories Ltd., 10-1 Morinosato-Wakamiya, Atsugi, Kanagawa 243-0197, Japan
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Shimomura Satoshi
Osaka University, 3-1 Machikaneyama, Toyonaka, Osaka 560-8531, Japan
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Shinohara Keisuke
National Institute of Information and Communications Technology (NICT), 4-2-1 Nukui-Kitamachi, Koganei, Tokyo 184-8795, Japan
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Shinohara Keisuke
National Institute of Information and Communications Technology, 4-2-1 Nukui-kitamachi, Koganei, Tokyo 184-8795, Japan
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Watanabe Issei
National Institute of Information and Communications Technology (NICT), 4-2-1 Nukui-Kitamachi, Koganei, Tokyo 184-8795, Japan
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Watanabe Issei
National Institute of Information and Communications Technology, 4-2-1 Nukui-kitamachi, Koganei, Tokyo 184-8795, Japan
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Watanabe Issei
National Institute of Information and Communications Technology, Koganei, Tokyo 184-8795, Japan
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Hiyamizu Satoshi
Osaka University, 3-1 Machikaneyama, Toyonaka, Osaka 560-8531, Japan
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Kitada Takahiro
Osaka University, 3-1 Machikaneyama, Toyonaka, Osaka 560-8531, Japan
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Matsui Toshiaki
National Institute of Information and Communications Technology (NICT), 4-2-1 Nukui-Kitamachi, Koganei, Tokyo 184-8795, Japan
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Hikosaka Kohki
Fujitsu Laboratories Ltd., 10-1 Morinosato-Wakamiya, Atsugi, Kanagawa 243-0197, Japan
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Hiyamizu Satoshi
Graduate School of Engineering Science, Osaka University, 1-3 Machikaneyama, Toyonaka, Osaka 560-8531, Japan
著作論文
- Effect of flatness of heterointerfaces on device performance of InP-based HEMTs
- Monte Carlo Simulations of Electron Transport in In0.52Al0.48As/In0.75Ga0.25As High Electron Mobility Transistors at 300 and 16 K
- E-Band Low-Noise Amplifier MMICs Using Nanogate InGaAs/InAlAs HEMT Technology
- Effect of Gate-Recess Structure on Electron Transport in InP-Based High Electron Mobility Transistors Studied by Monte Carlo Simulations
- Effects of Heterointerface Flatness on Device Performance of InP-Based High Electron Mobility Transistor