Effect of Gate-Recess Structure on Electron Transport in InP-Based High Electron Mobility Transistors Studied by Monte Carlo Simulations

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概要

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• We performed two-dimensional Monte Carlo (MC) simulations of 50-nm-gate InP-based lattice-matched In0.52Al0.48As/In0.53Ga0.47As high electron mobility transistors (HEMTs) and clarified the effect of gate-recess structure on electron transport. To understand the electron transport in the recessed-gate HEMTs, we used two parameters in the MC simulations: the lateral recess length l_{\text{re}} and recess depth d_{\text{re}}. When d_{\text{re}} is constant, the electron velocity in the channel layer under the gate electrode increases with decreasing l_{\text{re}}. On the other hand, when l_{\text{re}} is constant, the electron velocity in the channel under the gate increases with increasing d_{\text{re}}. The electron velocity increases when the steepness of the lateral potential profiles in the InGaAs channel around the drain-side end of the gate electrode increases.

• 2011-10-25

著者

• Endoh Akira

  National Inst. Of Information And Communications Technol. (nict) Koganei‐shi Jpn

• WATANABE Issei

  National Institute of Info. & Com. Tech.

• MATSUI Toshiaki

  National Institute of Info. & Com. Tech.

• MIMURA Takashi

  National Institute of Information and Communications Technology

• Mimura Takashi

  National Institute of Information and Communications Technology, Koganei, Tokyo 184-8795, Japan

• Endoh Akira

  National Institute of Information and Communications Technology, Koganei, Tokyo 184-8795, Japan

• Watanabe Issei

  National Institute of Information and Communications Technology, Koganei, Tokyo 184-8795, Japan

関連論文

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