Device Design Consideration for $V_{\text{th}}$-Controllable Four-Terminal Double-Gate Metal-Oxide-Semiconductor Field-Effect Transistor

概要

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The optimum device design for a threshold-voltage ($V_{\text{th}}$)-controllable four-terminal double-gate metal-oxide-semiconductor field-effect transistor (4T-DGFET) has been investigated by device simulation. The effects of the device parameters, e.g., workfunction ($\phi_{\text{m}}$) of the double gate, gate oxide thickness ($T_{\text{ox}}$), effective gate length ($L_{\text{eff}}$), and the range of the second gate voltage ($V_{\text{g2}}$) on 4T-DGFET performance have been systematically examined. Simulation results show that lowering $\phi_{\text{ms}}$ and increasing the second gate oxide thickness ($T_{\text{ox2}}$) are preferable for the improvement of 4T-DGFET performance. The short channel effects (SCEs) for the 4T-DGFET have also been investigated in terms of $V_{\text{th}}$ roll-off, degradation in subthreshold slope ($S$) and back-gate-effect factor ($\gamma$). It is shown that all the SCEs become severer with increasing $T_{\text{ox2}}$. As a result, in the case of the ultrashort $L_{\text{eff}}$ regime, a thick $T_{\text{ox2}}$ is not so preferable. In particular, under the limited $V_{\text{g2}}$ condition, a thin $T_{\text{ox2}}$ is advantageous for enhancing the drive current due to the high $V_{\text{th}}$ controllability and SCE immunity.
Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
2005-04-15