Optimization of the Body Bias Voltage Set (BBVS) for Flex Power FPGA(Reconfigurable Device and Design Tools,<Special Section>Reconfigurable Systems)

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This paper describes a new design concept, the Body Bias Voltage Set (BBVS), and presents the effect of the BBVS on static power, operating speed, and area overhead in an FPGA with field-programmable V_<th> components. A Flex Power FPGA is an FPGA architecture to solve the static power problem by the fine grain field-programmable V_<th> control method. Since the V_<th> of transistors for specific circuit blocks in the Flex Power FPGA is chosen from a set of V_<th> values defined by a BBVS, selection of a particular BBVS is an important design decision. A particular BBVS is chosen by selecting body biases from among several supplied body bias candidates. To select the optimal BBVS, we provide 136 BBVSs and perform a thorough search. In a BBVS of less V_<th> steps, the deepest reverse body bias for high-V_<th> transistors does not necessarily result in optimal conditions. A BBVS of 0.0V and -0.8V, which requires 1.65 times the original area, utilizes as little as 1/30 of the static power of a conventional FPGA without performance degradation. Use of an aggressive forward body bias voltage such as +0.6V for lowest-V_<th>, performance is increased by up to 10%. Another BBVS of +0.6V, 0.0V, and -0.8V reduces static power to 14.06% while maintaining a 10% performance increase, but it requires 2.75-fold area.
社団法人電子情報通信学会の論文
2007-12-01