Interface Reaction of a Silicon Substrate and Lanthanum Oxide Films Depositedby Metalorganic Chemical Vapor Deposition : Semiconductors
スポンサーリンク
概要
- 論文の詳細を見る
The interfacial layer and the transition layer of the lanthanum oxide film on a Si substrate prepared by metalorganic chemical vapor deposition have been studied by X-ray photoelectron spectroscopy, cross-sectional scanning transmission electron microscopy, and energy dispersive X-ray analysis. It was revealed that the diffusion of silicon into the lanthanum oxide occurs during the film deposition and post-annealing, and consequently, a lanthanum silicate is formed. The composition of lanthanum and silicon in the silicate is nonstoichiometric and gradually changes in the direction of the film thickness. These results show that the suppression of the silicon diffusion is essential in controling the properties of the dielectric films.
- 2002-04-01
著者
-
SUZUKI Eiichi
Nanoelectronics Research Institute, National Institute of Advanced Industrial Science and Technology
-
Suzuki Eiichi
Nanoelectronics Research Institute National Institute Of Advanced Industrial Science And Technology
-
SHIMIZU Takashi
Nanoelectronics Research Institute, National Institute of Advanced Industrial Science and Technology
-
Yamada Hirotoshi
Nanoelectronics Research Institute, National Institute of Advanced Industrial Science and Technology
-
Suzuki Eiichi
Nanoelectronics Research Institute (NeRI), National Institute of Advanced Industrial Science and Technology (AIST), Tsukuba Central2, 1-1-1 Umezono, Tsukuba, Ibaraki 305-8568, Japan
-
Shimizu Takashi
Nanoelectronics Research Institute (NeRI), National Institute of Advanced Industrial Science and Technology (AIST), Tsukuba Central2, 1-1-1 Umezono, Tsukuba, Ibaraki 305-8568, Japan
関連論文
- Enhancing Noise Margins of Fin-Type Field Effect Transistor Static Random Access Memory Cell by Using Threshold Voltage-Controllable Flexible-Pass-Gates
- Fabrication of a Vertical-Channel Double-Gate Metal-Oxide-Semiconductor Field-Effect Transistor Using a Neutral Beam Etching
- FinFET-Based Flex-Vth SRAM Design for Drastic Standby-Leakage-Current Reduction
- Fabrication of ultrathin Si Channel Wall For Vertical Double-Gate Metal-Oxide-Semiconductor Field-Effect Transistor (DG MOSFET) by Using Ion-Bombardment-Retarded Etching (IBRE)
- Vertical Ultrathin-channel Multi-gate MOSFETs (MuGFETs) : Technological Challenges and Future Developments
- Investigation of N-Channel Triple-Gate MOSFETs on (100) SOI Substrate
- Demonstration of Dopant Profiling in Ultrathin Channels of Vertical-Type Double-Gate Metal-Oxide-Semiconductor Field-Effect-Transistor by Scanning Nonlinear Dielectric Microscopy
- Device Design Consideration for V_-Controllable Four-Terminal Double-Gate Metal-Oxide-Semiconductor Field-Effect Transistor
- P-Channel Vertical Double-Gate MOSFET Fabricated by Utilizing Ion-Bombardment-Retarded Etching Processs
- Novel Process for Vertical Double-Gate (DG) Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET) Fabrication
- Demonstration of Dopant Profiling in Ultrathin Channels of Vertical-Type Double-Gate Metal-Oxide-Semiconductor Field-Effect-Transistor by Scanning Nonlinear Dielectric Microscopy
- Interface Reaction of a Silicon Substrate and Lanthanum Oxide Films Depositedby Metalorganic Chemical Vapor Deposition : Semiconductors
- Fabrication of ultrathin Si Channel Wall For Vertical Double-Gate Metal-Oxide-Semiconductor Field-Effect Transistor (DG MOSFET) by Using Ion-Bombardment-Retarded Etching (IBRE)
- Novel Process for Vertical Double-Gate (DG) Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET) Fabrication
- Device Design Consideration for $V_{\text{th}}$-Controllable Four-Terminal Double-Gate Metal-Oxide-Semiconductor Field-Effect Transistor
- Dual-Metal-Gate Transistors with Symmetrical Threshold Voltages Using Work-Function-Tuned Ta/Mo Bilayer Metal Gates
- Ta/Mo Stack Dual Metal Gate Technology Applicable to Gate-First Processes
- P-Channel Vertical Double-Gate MOSFET Fabricated by Utilizing Ion-Bombardment-Retarded Etching Processs
- Demonstration and Analysis of Accumulation-Mode Double-Gate Metal–Oxide–Semiconductor Field-Effect Transistor
- Electrical Properties of Ruthenium/Metalorganic Chemical Vapor Deposited La-Oxide/Si Field Effect Transistors