Masahara Meishoku | Nanoelectronics Research Institute National Institute Of Advanced Industrial Science And Technology

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概要

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著作論文

Enhancing Noise Margins of Fin-Type Field Effect Transistor Static Random Access Memory Cell by Using Threshold Voltage-Controllable Flexible-Pass-Gates
FinFET-Based Flex-Vth SRAM Design for Drastic Standby-Leakage-Current Reduction
Demonstration of Dopant Profiling in Ultrathin Channels of Vertical-Type Double-Gate Metal-Oxide-Semiconductor Field-Effect-Transistor by Scanning Nonlinear Dielectric Microscopy
Fabrication of ultrathin Si Channel Wall For Vertical Double-Gate Metal-Oxide-Semiconductor Field-Effect Transistor (DG MOSFET) by Using Ion-Bombardment-Retarded Etching (IBRE)
Novel Process for Vertical Double-Gate (DG) Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET) Fabrication
A 0.7-V Opamp in Scaled Low-Standby-Power FinFET Technology
A 0.7-V Opamp in Scaled Low-Standby-Power FinFET Technology
Device Design Consideration for $V_{\text{th}}$-Controllable Four-Terminal Double-Gate Metal-Oxide-Semiconductor Field-Effect Transistor
Dual-Metal-Gate Transistors with Symmetrical Threshold Voltages Using Work-Function-Tuned Ta/Mo Bilayer Metal Gates
Ta/Mo Stack Dual Metal Gate Technology Applicable to Gate-First Processes
P-Channel Vertical Double-Gate MOSFET Fabricated by Utilizing Ion-Bombardment-Retarded Etching Processs
Demonstration and Analysis of Accumulation-Mode Double-Gate Metal–Oxide–Semiconductor Field-Effect Transistor
A Novel Process for Fabrication of Gated Silicon Field Emitter Array Taking Advantage of Ion Bombardment Retarded Etching
Programmable Conductivity of Silicon Nanowires with Side Gates by Surface Charging
Atomic Layer Deposition of SiO
Atomic Layer Deposition of SiO₂ for the Performance Enhancement of Fin Field Effect Transistors

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