Ishii Kenichi | Nanoelectronics Research Institute National Institute Of Advanced Industrial Science And Technology (aist)

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著作論文

Enhancing Noise Margins of Fin-Type Field Effect Transistor Static Random Access Memory Cell by Using Threshold Voltage-Controllable Flexible-Pass-Gates
Fabrication of a Vertical-Channel Double-Gate Metal-Oxide-Semiconductor Field-Effect Transistor Using a Neutral Beam Etching
Investigation of N-Channel Triple-Gate MOSFETs on (100) SOI Substrate
Fabrication of ultrathin Si Channel Wall For Vertical Double-Gate Metal-Oxide-Semiconductor Field-Effect Transistor (DG MOSFET) by Using Ion-Bombardment-Retarded Etching (IBRE)
Novel Process for Vertical Double-Gate (DG) Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET) Fabrication
Dual-Metal-Gate Transistors with Symmetrical Threshold Voltages Using Work-Function-Tuned Ta/Mo Bilayer Metal Gates
Ta/Mo Stack Dual Metal Gate Technology Applicable to Gate-First Processes
P-Channel Vertical Double-Gate MOSFET Fabricated by Utilizing Ion-Bombardment-Retarded Etching Processs
Demonstration and Analysis of Accumulation-Mode Double-Gate Metal–Oxide–Semiconductor Field-Effect Transistor

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