Analog Circuit Design Methodology in a Low Power RISC Microprocessor (Srecial Section on Analong Circuit Tectningues in the Digital-oriented Era)
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概要
- 論文の詳細を見る
There are various kinds of analog CMOS circuits in microprocessors. IOs, clock distribution circuits including PLL, memories are the main analog circuits. The circuit techniques to achieve low power dissipation combined with high performance in newest prototype chip in the Super H RISC engines are described. A TLB delay can be decreased by using a CAM with a differential amplifier to generate the match signal. The accelerator circuit also helps to speed up the TLB circuit, enabling single-cycle operation. A fabricated 96-mm^2 test chip with the super H architecture using 0.35-μm four metal CMOS technology is capable of 167-MHz operation at 300 Dhrystone MIPS with 2.0-W power dissipation.
- 1998-02-25
著者
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HASHIMOTO Naotaka
Semiconductor & Integrated Circuits Division, Hitachi Ltd.
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IKEDA Shuji
Semiconductor & Integrated Circuits Division, Hitachi Ltd.
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ISHIBASHI Koichiro
Central Research Laboratory, Hitachi, Ltd.
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Ikeda Shuji
Semiconductor And Integrated Circuit Division Hitachi Ltd.
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Ikeda Shuji
Semiconductor & Integrated Circuits Div. Hitachi Ltd.
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Higuchi H
Hitachi Ltd. Hadano‐shi Jpn
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UCHIYAMA Kunio
Central Research Laboratory, Hitachi, Ltd.
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Uchiyama K
Hitachi Ltd. Kokubunji‐shi Jpn
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Uchiyama Kunio
Central Research Laboratory Hitachi Ltd.
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HIGUCHI Hisayuki
Central Research Laboratory, Hitachi Ltd.
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SHIMBO Toshinobu
Hitachi ULSI Engineering Corporation
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SHIOZAWA Kenji
Semiconductor and IC Division, Hitachi Ltd.
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Shiozawa K
Semiconductor & Integrated Circuits Division Hitachi Ltd.
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Higuchi Hisayuki
Central Research Laboratory Hitachi Ltd.
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Ishibashi K
Riken Wako‐shi Jpn
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Ishibashi Koichiro
Central Research Laboratory Hitachi Ltd.
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SHIOZAWA Kenji
Semiconductor & Integrated Circuits Division, Hitachi Ltd.
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