CMOS Process Compatible ie-Flash(Inverse Gate Electrode Flash)Technology for System-on-a Chip(Special Issue on Nonvolatile Memories)
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概要
- 論文の詳細を見る
A highly reliable single-poly flash technology named ie-Flash(inverse gate electrode Flash), which can be embedded in a standard CMOS process without any process modifications, has been developed. The ie-flash cell consists of two elementary cells for OR-logical reading, resulting in significant improvement of reliability. 5V-programming with 1 ms duration and 1.2 V-read operation of 35 bit memory modules fabricated by a 0.14 μm CMOS process is demonstrated. This flash technology will extends not only testing cost reduction of the system-on-a chip by replacing laser-link but also provides flexibility of programmable logic applications.
- 社団法人電子情報通信学会の論文
- 2001-06-01
著者
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YANAGISAWA Kazumasa
Semiconductor & Integrated Circuits Div., Hitachi Ltd.
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Shukuri S
Semiconductor & Integrated Circuits Div.hitachi Ltd.
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Ishibashi Koichiro
Central Research Laboratory Hitachi Ltd.
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Yanagisawa Kazumasa
Semiconductor & Integrated Circuits Div.hitachi Ltd.
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SHUKURI Shoji
Semiconductor & Integrated Circuits Div.Hitachi Ltd.
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