High-Speed CMOS SRAM Technologies for Cache Applications (Special Issue on ULSI Memory Technology)

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概要

• 論文の詳細を見る

• This paper describes high-speed CMOS SRAM circuit technologies used in cache memories. In recent years, high-speed SRAM technology has led to higher cycle frequencies, but the rate of increase in the SRAM density has slowed. Operating modes of high-speed SRAMs are compared and the advantage of wave-pipelined SRAMs in terms of cycle frequency is shown. Three types of sense amplifiers used in SRAMs are also compared from the viewpoint of speed and power dissipation. Current sense amplifiers provide high-speed operation with low power dissipation, while latch-type sense amplifiers appear most suitable for ultra-low-power SRAMs. Low voltage operation and size reduction of full CMOS cells are now the most pressing issues in the development of SRAMs for cache memories.

• 社団法人電子情報通信学会の論文
• 1996-06-25

著者

• Ishibashi Koichiro

  Central Research Laboratory Hitachi Ltd.

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• A 2-ns-Access, 285-MHz, Two-Port Cache Macro Using Double Global Bit-Line Pairs
• An 8-mW, 8-kB Cache Memory Using an Automatic-Power-Save Architecture for Low Power RISC Microprocessors (Special Issue on low-Power LSI Technologies)
• High-Speed CMOS SRAM Technologies for Cache Applications (Special Issue on ULSI Memory Technology)
• CMOS Process Compatible ie-Flash(Inverse Gate Electrode Flash)Technology for System-on-a Chip(Special Issue on Nonvolatile Memories)

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