A High Performance p-Channel Transistor:β-MOS FET

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概要

• 論文の詳細を見る
• 1996-02-01

著者

• Yoh K

  Hokkaido Univ. Sapporo Jpn

• Yoh Kanji

  Research Center For Integrated Quantum Electronics Hokkaido University

• KOIZUMI Ryouji

  Research Center for Interface Quantum Electronics, Hokkaido University

• HASHIMOTO Naotaka

  Semiconductor & Integrated Circuits Division, Hitachi Ltd.

• IKEDA Shuji

  Semiconductor & Integrated Circuits Division, Hitachi Ltd.

• Ikeda Shuji

  Semiconductor & Integrated Circuits Division Hitachi Ltd.

• Koizumi Ryouji

  Research Center For Interface Quantum Electronics Hokkaido University

• Koizumi R

  Research Center For Interface Quantum Electronics Hokkaido University

関連論文

• Optical Characterization of InAs Quantum Dots Fabricated by Molecular Beam Epitaxy
• Optical Characterization of InAs Quantum Dots Fabricated by Molecular Beam Epitaxy
• A High Performance p-Channel Transistor:β-MOS FET
• A High Performance p-Channel Transistor : β-MOS FET
• A 6-ns 4-Mb CMOS SRAM with Offset-Voltage-Insensitive Current Sense Amplifiers(Special Issue on the 1994 VLSI Circuits Symposium)
• Fabrication of InAs Single-Crystal Free-Standing Wires for the Study of Electron and Thermal Transport
• Indium Arsenide Quantum Wires Fabricated by Electron Beam Lithography and Wet-Chemical Etching
• Complementary InAs n-Channel and GaSb p-Channel Quantum Well Heterojunction Field-Effect Transistors
• Thermodynamic Calculation of Phase Equilibria in As-Fe-In Ternary System Based on CALPHAD Approach
• Energy-Dependent Effective Mass Approximation in One-Dimensional Quantum Dots ( Quantum Dot Structures)
• Self-Assembled InAs Quantum Dots Buried in AlGaAs Barrier and Their Application to Split-Gate HEMT Operating at 77K
• Fabrication of p^+-Gate InAs-Channel HEMT Based on InP
• Fabrication of p^+-Gate InAs-Channel HEMT Based on InP
• Charging Effect of InAs Dots in Split-Gate High Electron Mobility Transistor Structure ( Quantum Dot Structures)
• Analog Circuit Design Methodology in a Low Power RISC Microprocessor (Srecial Section on Analong Circuit Tectningues in the Digital-oriented Era)
• Spin-Polarized Electron Injection through an Fe/InAs Junction
• Thermal stability of Pd gate in pseudomorphic InGaAs heterostructures (Special issue: Microprocesses and nanotechnology)
• Mechanical Stress Simulation for Highly Reliable Deep-Submicron Devices (Special Issue on TCAD for Semiconductor Industries)
• Regular Array Formation of Self-Assembled InAs Dots Grown on Patterned (111)B GaAs Substrate by MBE
• A 12.5-ns 16-Mb CMOS SRAM with Common-Centroid-Geometry-Layout Sense Amplifiers (Special Section on the 1993 VLSI Circuits Symposium (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol.29, No.4 April 1994))
• Stress Analysis of Transistor Structures Considering the Internal Stress of Thin Films
• A 2-ns-Access, 285-MHz, Two-Port Cache Macro Using Double Global Bit-Line Pairs
• Proposal of graphene bandgap control by hexagonal network formation (Special issue: Microprocesses and nanotechnology)
• A Novel Bistable Double-Barrier Resonant Tunnel Diode by Charging Effect of InAs Dots
• A High Performance p-Channel Transistor: β-MOS FET
• Spin-Polarized Electron Injection through an Fe/InAs Junction
• Fabrication of p--n--p Graphene Structure and Observation of Current Oscillation
• Optical Characterization of InAs Quantum Dots Fabricated by Molecular Beam Epitaxy
• A Novel Bistable Double-Barrier Resonant Tunnel Diode by Charging Effect of InAs Dots
• Regular Array Formation of Self-Assembled InAs Dots Grown on Patterned (111)B GaAs Substrate by MBE

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