A High Performance p-Channel Transistor: β-MOS FET
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概要
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We have fabricated a β (Bipolar Enhanced Transistor Action) MOS FET device which operates in combined FET and bipolar modes, while perfectly maintaining the MOSFET circuit configuration with extended operational voltage up to -4 volts due to gate-voltage-controlled base resistance of the parasitic lateral bipolar transistor. Three types of gate-to-substrate contact were investigated including ultrathin tunnelling barriers. The p-channel β-MOS FET showed dramatic improvements in transconductance by a factor of 4 while maintaining the same threshold voltage (≈-1 V) compared with conventional MOS structures. This result of 1.3 µm β-MOS FET is favorably compared with one tenth of a micron p-MOS FET.
- 1996-02-28
著者
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Yoh Kanji
Research Center For Integrated Quantum Electronics Hokkaido University
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HASHIMOTO Naotaka
Semiconductor & Integrated Circuits Division, Hitachi Ltd.
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IKEDA Shuji
Semiconductor & Integrated Circuits Division, Hitachi Ltd.
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Koizumi Ryouji
Research Center For Interface Quantum Electronics Hokkaido University
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Yoh Kanji
Research Center for Interface Quantum Electronics, Hokkaido University, North 13, West 8, Kita-ku, Sapporo 060, Japan
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Koizumi Ryouji
Research Center for Interface Quantum Electronics, Hokkaido University, North 13, West 8, Kita-ku, Sapporo 060, Japan
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Hashimoto Naotaka
Semiconductor & Integrated Circuits Division, Hitachi Ltd., 5-20-1 Josuihoncho, Kodaira-shi, Tokyo 187, Japan
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