High Mobility Dual Metal Gate MOS Transistors with High-k Gate Dielectrics
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概要
- 論文の詳細を見る
- 2004-09-15
著者
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MORIOKA Ayuka
System Devices Research Laboratories, NEC Corporation
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WATANABE Heiji
System Devices Research Laboratories, NEC Corporation
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TATSUMI Toru
System Devices Research Laboratories, NEC Corporation
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IKARASHI Taeko
System Devices Research Laboratories, NEC Corp.
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Yoshihara Takuya
System Devices Research Laboratories Nec Corporation
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Tatsumi Toru
System Devices Research Laboratories Nec Corporation
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Morioka Ayuka
System Devices Research Laboratories Nec Corporation
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Ikarashi Taeko
System Devices Research Laboratories Nec Corporation
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Watanabe Heiji
System Devices Research Laboratories Nec Corporation
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Manabe Katsuya
System Devices Research Laboratories Nec Corporation
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TAKAHASHI Kensuke
System Devices Research Laboratories, NEC Corporation
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MANABE Kenzo
System Devices Research Laboratories, NEC Corporation
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Takahashi Kensuke
System Devices Research Laboratories Nec Corporation
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Tatsumi Toru
System Devices And Fundamental Research Nec Corporation
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Manabe Kenzo
System Devices Research Laboratories Nec Corporation
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Watanabe Hirohito
System Devices Research Laboratories Nec Corp.
関連論文
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- Influence of Charge Traps within HfSiON Bulk on Positive and Negative Bias Temperature Instability of HfSiON Gate Stacks
- 1.2nm HfSiON/SiON Stacked Gate Insulators for 65-nm-Node MISFETs
- Breakdown Mechanisms and Lifetime Prediction for 90nm-node Low-power HfSiON/SiO_2 CMOSFETs
- Influences of Traps within HfSiON Bulk on Positive- and Negative-Bias Temperature Instability of HfSiON Gate Stacks
- 1.2nm HfSiON/SiON stacked gate insulators for 65nm-node MISFETs
- Suppression of Charges in Al_2O_3 Gate Dielectric and Improvement of MOSFET Performance by Plasma Nitridation(High-κ Gate Dielectrics)
- Suppression of Charges in Al_2O_3 Gate Dielectric and Improvement of MOSFET Performance by Plasma Nitridation
- High-Mobility Dual Metal Gate MOS Transistors with High-k Gate Dielectrics
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- High Mobility Dual Metal Gate MOS Transistors with High-k Gate Dielectrics
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- Mechanism for Fermi Level Pinning at Electrode/Hf-Based Dielectric Interface: Systematic Study of Dependence of Effective Work Functions for Polycrystalline Silicon and Fully Silicided NiSi Electrodes on Hf Density at Interface
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- Breakdown Mechanisms and Lifetime Prediction for 90-nm-Node Low-Power HfSiON/SiO2 CMOSFETs
- Influence of Charge Traps within HfSiON Bulk on Positive and Negative Bias Temperature Instability of HfSiON Gate Stacks
- Fully Silicided NiSi Gate Electrodes on HfSiON Gate Dielectrics for Low-Power Applications
- Analysis of Origin of Threshold Voltage Change Induced by Impurity in Fully Silicided NiSi/SiO2 Gate Stacks
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- Origin of Flatband Voltage Shift in Poly-Si/Hf-Based High-k Gate Dielectrics and Flatband Voltage Dependence on Gate Stack Structure