1.2nm HfSiON/SiON Stacked Gate Insulators for 65-nm-Node MISFETs

スポンサーリンク

概要

論文の詳細を見る
2005-04-30

著者

関連論文

Physical model for reset state of Ta2O5/TiO2-stacked resistance random access memory (Special issue: Solid state devices and materials)
極薄プラズマ酸窒化膜MOSFETのNBTI信頼性に対する窒素プロファイルとフッ素注入の効果(ゲート絶縁膜、容量膜、機能膜及びメモリ技術)
45nmノード低消費電力デバイス用Ni_xSi/HfSiONゲートスタック構造(プロセスクリーン化と新プロセス技術)
Poly-Si/HfSiO/SiO_2ゲート構造を用いた低電力、高速HfSiOゲートCMOSFET(IEDM特集:先端CMOSデバイス・プロセス技術)
ラジカル酸窒化法を用いたSTI端近傍のグート絶縁膜改善による高性能・高信頼サブ1.5nmグート酸窒化膜形成
Breakdown Mechanisms and Lifetime Prediction for 90-nm-Node Low-Power HfSiON/SiO_2 CMOSFETs
Influence of Charge Traps within HfSiON Bulk on Positive and Negative Bias Temperature Instability of HfSiON Gate Stacks
1.2nm HfSiON/SiON Stacked Gate Insulators for 65-nm-Node MISFETs
Breakdown Mechanisms and Lifetime Prediction for 90nm-node Low-power HfSiON/SiO_2 CMOSFETs
Influences of Traps within HfSiON Bulk on Positive- and Negative-Bias Temperature Instability of HfSiON Gate Stacks
1.2nm HfSiON/SiON stacked gate insulators for 65nm-node MISFETs
グラファイト・ナノリボンの電子構造
グラファイト・ナノクリスタルおよびグラファイト・ナノリボンの作製
Ni(111)表面上単原子層グラファイトの構造解析
3p-J-12 単原子層h-BNに被膜されたNi(111)表面上におけるグラファイト吸着層の成長及び電子状態の観察
3a-K-3 Ni(111)表面上のグラファイト及びh-BN単原子層膜の構造解析
Suppression of Charges in Al_2O_3 Gate Dielectric and Improvement of MOSFET Performance by Plasma Nitridation(High-κ Gate Dielectrics)
Suppression of Charges in Al_2O_3 Gate Dielectric and Improvement of MOSFET Performance by Plasma Nitridation
Atomic Structural Analysis of a Monolayer Epitaxial Film of Hexagonal Boron Nitride/Ni(111) studied by LEED Intensity Analysis(Interfaces by various techniques)
Effects of Si/Ni composition ratio of NixSiy gate electrode and Hf/Si composition ratio of Hf-based high-k insulator on threshold voltage controllability and mobility of metal-oxide-semiconductor field-effect transistors
サマリー・アブストラクト
Intra-Leve Mix-and-Match Lithography Process for Fabricating Sub-100-nm Complementary Metal-Oxide-Semiconductor Devices using the JBX-9300FS Point-Electron-Beam System
High-Mobility Dual Metal Gate MOS Transistors with High-k Gate Dielectrics
Fully Silicided NiSi Gate Electrodes on HfSiON Gate Dielectrics for Low-Power Applications
High Mobility Dual Metal Gate MOS Transistors with High-k Gate Dielectrics
Fully Silicided NiSi Gates on HfSiON Gate Dielectrics for Low Power Application
Uniform Raised-Salicide Technology for High-Performance CMOS Devices(Special Issue on Advanced Sub-0.1μm CMOS Devices)
Uniform Si-SEG and Ti/SEG-Si Thickness Ratio Control for Ti-Salicided Sub-Quarter-Micron CMOS Devices
Mechanism of Suppressed Change in Effective Work Functions for Impurity-Doped Fully Silicided NiSi Electrodes on Hf-Based Gate Dielectrics
Analysis of the Origin of the Threshold Voltage Change Induced by Impurity in Fully Silicided NiSi/SiO_2 gate stacks
Formation of Nickel Self-Aligned Silicide by Using Cyclic Deposition Method
Characterization of Ferroelectric Domain Behavior in MOCVD-PZT Capacitors for CMVP FeRAMs
Formation of Nickel Self-Aligned Silicide by Using Cyclic Deposition Method
7-Mask Self-Aligned SiGe Base Bipolar Transistors with f_T of 80 GHz
1.2 nm HfSiON/SiON Stacked Gate Insulators for 65-nm-Node MISFETs
Breakdown Mechanisms and Lifetime Prediction for 90-nm-Node Low-Power HfSiON/SiO2 CMOSFETs
Influence of Charge Traps within HfSiON Bulk on Positive and Negative Bias Temperature Instability of HfSiON Gate Stacks
Fully Silicided NiSi Gate Electrodes on HfSiON Gate Dielectrics for Low-Power Applications

もっと見る

スポンサーリンク