A High-Performance Time-Domain Winner-Take-All Circuit Employing OR-Tree Architecture
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概要
- 論文の詳細を見る
- 2001-09-25
著者
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SHIBATA Tadashi
Department of Physics,Faculty of Science,Osaka University
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OGAWA Makoto
Department of Nuclear Engineering, School of Engineering, Tokai University
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Ito Kenchi
Hitachi Ltd. Central Research Laboratory
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OGAWA Masaru
Optical Disk Systems Development Center, Sharp Corporation
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Shibata Tadashi
Department Of Electrical Engineering And Information Systems School Of Engineering The University Of
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Ogawa Masaru
Optical Disk Systems Development Center Sharp Corporation
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ITO Kiyoto
Department of Frontier Informatics, School of Frontier Science, The University of Tokyo
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Ogawa Makoto
Department Of Earth Environment And Resources Sciences Graduate School Of Creative Science And Engin
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Ito Kiyoto
Department Of Frontier Informatics School Of Frontier Sciences The University Of Tokyo
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Ogawa Makoto
Department Mechanical Engineering Ii Shibaura Institute Of Technology
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Shibata Tadashi
Department of Electrical Engineering and Information System, The University of Tokyo, Bunkyo, Tokyo 113-8656, Japan
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