Nanoscale Wet Etching of Physical-Vapor-Deposited Titanium Nitride and Its Application to Sub-30-nm-Gate-Length Fin-Type Double-Gate Metal–Oxide–Semiconductor Field-Effect Transistor Fabrication

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The nanoscale wet etching of physical-vapor-deposited (PVD) titanium nitride (TiN) and its application to sub-30-nm-gate-length fin-type double-gate metal–oxide–semiconductor field-effect transistor (FinFET) fabrication are systematically investigated. It is experimentally found that PVD-TiN side-etching depth can be controlled to be one-half of PVD-TiN thickness with precise time control using an $\text{ammonium hydroxide (NH$_{4}$OH)} : \text{hydrogen peroxide (H$_{2}$O$_{2}$)} : \text{deionized water (H$_{2}$O)} = 1 : 2 : 5$ solution at 60 °C. Using the developed nanoscale PVD-TiN wet etching technique, sub-30-nm-physical-gate-length FinFETs, 100-nm-tall fin-channel complementary MOS (CMOS) inverters and static random access memory (SRAM) half-cells have successfully been fabricated and demonstrated. These experimental results indicate that the developed nanoscale PVD-TiN wet etching technique is very useful for tall fin-channel CMOS fabrication.
2010-06-25