Extraction of Trap Densities at Front and Back Interfaces in Thin-Film Transistors

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概要

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• A technique for extracting trap densities at front and back interfaces has been developed for thin-film transistors. This extraction technique utilizes front and back capacitance-voltage characteristics, $Q{=}CV$, the Poisson equation and carrier density equations. The validity of this extraction technique is confirmed using device simulation. Actual trap densities are extracted, and it is found that both trap densities have the same figure. Moreover, they include deep states and therefore seem to be caused by dangling bonds.

• 2004-01-15

著者

• INOUE Satoshi

  Technology Platform Research Center, Seiko Epson Cooperation

• TAM Simon

  Cambridge Research Laboratory of Epson

• Shimoda Tatsuya

  Technology Platform Research Center Seiko Epson Corp.

• Kimura Mutsumi

  Department of Chemistry, Graduate School of Natural Science and Technology, Okayama University

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