High-Performance Polycrystalline Silicon Thin-Film Transistors Fabricated by High-Temperature Process with Excimer Laser Annealing
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概要
- 論文の詳細を見る
Polycrystalline silicon (p-Si) thin-film transistors (TFTs) were fabricated using a high-temperature process that included solid-phase crystallization (SPC) and dry thermal oxidation with excimer laser annealing (ELA). X-ray diffraction and transmission electron microscopy analyses showed that the ELA process improved the quality of p-Si films markedly. The p-Si TFTs exhibited a higher performance than the SPC and a-Si+ELA p-Si TFTs. The field-effect mobility for n-type self-aligned TFTs was 251 cm2$\cdot$V-1$\cdot$s-1. The longitudinal junction diffusion length of the p-Si TFTs was shorter than that of the SPC p-Si TFTs. This is favorable for fine design rules. This fabrication process is consistent with the high-temperature-processed p-Si TFT development trend towards using large substrates, low temperatures, and fine design rules.
- Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
- 2004-06-15
著者
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INOUE Satoshi
Technology Platform Research Center, Seiko Epson Cooperation
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Shimoda Tatsuya
Technology Platform Research Center Seiko Epson Corp.
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TSUNEKAWA Yoshifumi
TFT Design Technology Department, SEIKO EPSON Corporation
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Jiroku Hiroaki
Technology Platform Research Center Seiko Epson Corporation
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Miyasaka Mitsutoshi
Technology Platform Research Center Seiko Epson Corporation
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Tsunekawa Yoshifumi
TFT Design Technology Department, SEIKO EPSON Corporation, 1010 Fujimi, Suwa-gun, Nagano 399-0295, Japan
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Miyasaka Mitsutoshi
Technology Platform Research Center, SEIKO EPSON Corporation, 281 Fujimi, Suwa-gun, Nagano 399-0293, Japan
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Jiroku Hiroaki
Technology Platform Research Center, SEIKO EPSON Corporation, 281 Fujimi, Suwa-gun, Nagano 399-0293, Japan
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