Preemptive Hardware Multitasking on Dynamically Partially Reconfigurable FPGAs : Hardware and Reconfiguration Layers

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概要

• 論文の詳細を見る

• Preemption techniques for HW (hardware) tasks have been studied in order to improve their responsiveness and to allow implementation of a blocking call within a task. In order to support preemption of HW tasks at a level of a conventional software multitasking OS, context saving and restoring mechanisms must be implemented in hardware and appropriate software programming interface, abstracting their implementation details, provided. This paper presents a solution for efficient preemptive hardware multitasking on Xilinx Virtex FPGAs. It comprises an embedded system framework and design flow back-end tools which automate generation of preemptable HW tasks and configuration files used by the framework. The framework features in a high-speed reconfiguration/readback controller and a low-footprint configuration layer. The layer provides an easy-to-use API (Application Programming Interface) facilitating management of the preemption process, which could be used as a base of a fully fledged preemptive SW/HW multitasking OS. The framework has been implemented on top of the Virtex-4 FPGAs and showed promising results.

• 2011-09-19

著者

• Honda Shinya

  Graduate School of Information Science, Nagoya University

• Shinya Honda

  Graduate School of Information Science, Nagoya University

• Jozwik Krzysztof

  Graduate School of Information Science, Nagoya University

• Honda Shinya

  Graduate School Of Information Science Nagoya University

• Jozwik Krzysztof

  Graduate School Of Information Science Nagoya University

• Tomiyama Hiroyuki

  Graduate School Of Information Science Nagoya University

• Tomiyama Hiroyuki

  The Department Of Computer Science And Communication Engineering Graduate School Of Information Scie

• Tomiyama Hiroyuki

  The Interdisciplinary Graduate School Of Engineering Sciences Kyushu University

• Takada H

  Graduate School Of Information Science Nagoya University

• Tomiyama H

  Department Of Information Engineering The Graduate School Of Information Science Nagoya University

• Takada H

  Department Of Information Engineering The Graduate School Of Information Science Nagoya University

• Tomiyama H

  Graduate School Of Information Science Nagoya University

• Takada Hiroaki

  College of Science and Engineering, Ritsumeikan University

• 本田 晋也

  Graduate School of Information Science, Nagoya University

• 冨山 宏之

  Graduate School of Information Science, Nagoya University

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