Language and Compiler for Optimizing Datapath Widths of Embedded Systems (Special Section on VLSI Design and CAD Algorithms)

概要

論文の詳細を見る
The datapath width of a core processor has a strong effect on cost, power consumption, and performance of an embedded system integrated with memories into a single-chip. However, it is difficult for designers to appropriately determine the datapath width for each application because of the limited reusability of software and the lack of compilation techniques. The apuarpose of this paper is to clarify supports required from software for the optimal datapath width determination. As a solution, an embedded programming language, called Valenn-C, and a retargetable Vale-C compiler are proposed. In this paper, the syntax and semantics of Valen-C along with the mechanism of the Valen-C retargetable compiler and how to preserve the accuracy of computation of programs in relation to various datapath widths are also described. Experiments with practical applications show that the total cost of the system including a core processor, ROM, and RAM is drastically reduced with little performace loss by reducing the datapath width.
社団法人電子情報通信学会の論文
1998-12-25