Tomiyama Hiroyuki | The Department Of Computer Science And Communication Engineering Graduate School Of Information Scie

スポンサーリンク

概要

関連著者

もっと見る

著作論文

Effective hardware task context switching in Virtex-4 FPGAs (VLSI設計技術)
Effective hardware task context switching in Virtex-4 FPGAs (コンピュータシステム)
Effective hardware task context switching in Virtex-4 FPGAs (リコンフィギャラブルシステム)
Instruction Schecduling to Reduce Switching Activity of Off-Chip Buses for Low-Power Systems with Caches (Special Section on VLSI Design and CAD Algorithms)
Language and Compiler for Optimizing Datapath Widths of Embedded Systems (Special Section on VLSI Design and CAD Algorithms)
Soft-Core Processor Architecture for Embedded System Design(Special Issue on Novel VLSI Processor Architectures)
Memory Data Organization for Low-Energy Address Buses(Low-Power System LSI, IP and Related Technologies)
Impacts of Compiler Optimizations on Address Bus Energy : An Empirical Study(VLSI Design Technology and CAD)
A front-end for better behavioral synthesis
A front-end for better behavioral synthesis
Embedded System Cost Optimization via Data Path Width Adjustment (Special Issue on Synthesis and Verification of Hardware Design)
Satsuki: An Integrated Processor Synthesis and Compiler Generation System (Special Issue on Synthesis and Verification of Hardware Design)
Partitioning of Behavioral Descriptions with Exploiting Function-Level Parallelism
Function-Level Partitioning of Sequential Programs for Efficient Behavioral Synthesis
Function Call Optimization for Efficient Behavioral Synthesis
An RTOS-Based Design and Validation Methodology for Embedded Systems(System Programs)
RTOS-Centric Cosimulator for Embedded System Design
Automatic Communication Synthesis with Hardware Sharing for Multi-Processor SoC Design
Module Selection Using Manufacturing Information (Special Section on VLSI Design and CAD Algorithms)
Preemptive Hardware Multitasking on Dynamically Partially Reconfigurable FPGAs : Hardware and Reconfiguration Layers
A Novel Framework for Effective Preemptive Hardware Multitasking on FPGAs

もっと見る

スポンサーリンク