Honda Shinya | Graduate School of Information Science, Nagoya University
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概要
関連著者
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Honda Shinya
Graduate School of Information Science, Nagoya University
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Honda Shinya
Graduate School Of Information Science Nagoya University
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Shinya Honda
Graduate School of Information Science, Nagoya University
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Tomiyama Hiroyuki
Graduate School Of Information Science Nagoya University
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Tomiyama Hiroyuki
The Department Of Computer Science And Communication Engineering Graduate School Of Information Scie
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Tomiyama Hiroyuki
The Interdisciplinary Graduate School Of Engineering Sciences Kyushu University
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Takada H
Graduate School Of Information Science Nagoya University
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Tomiyama H
Department Of Information Engineering The Graduate School Of Information Science Nagoya University
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Takada H
Department Of Information Engineering The Graduate School Of Information Science Nagoya University
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Tomiyama H
Graduate School Of Information Science Nagoya University
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Takada Hiroaki
Graduate School Of Information Science Nagoya University
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Takada Hiroaki
Graduate School of Information Science, Nagoya University
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Jozwik Krzysztof
Graduate School Of Information Science Nagoya University
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Tomiyama Hiroyuki
Graduate School of Information Science, Nagoya University
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Jozwik Krzysztof
Graduate School of Information Science, Nagoya University
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Hara Yuko
Graduate School of Information Science, Nagoya University
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TOMIYAMA Hiroyuki
Department of Pblymer Science and Engineering, Faculty of Engineering, Yamagata University
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HONDA Shinya
Department of Neurosurgery, Kochi Medical School
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Honda Shinya
Department Of Biological Science And Technology And Tissue Engineering Research Center Tokyo Univers
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Takada Hiroaki
Department Of Electrical Engineering Chiba University
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Tomiyama Hiroyuki
Department Of Neurology Juntendo University School Of Medicine
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Tomiyama Hiroyuki
Department Of Information Engineering The Graduate School Of Information Science Nagoya University
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Hara Yuko
Department Of Information Engineering The Graduate School Of Information Science Nagoya University
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Tomiyama Hiroyuki
College Of Science And Engineering Ritsumeikan University
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Shibata Seiya
Graduate School of Information Science, Nagoya University
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Hara Yuko
Department of Chemical Engineering, Graduate School of Engineering, Osaka Prefecture University
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Hara Yuko
Department Of Biological Sciences Graduate School Of Science University Of Tokyo
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Ando Yuki
Graduate School Of Information Science Nagoya University
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Shibata Seiya
Graduate School Of Information Science Nagoya University
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Ishii Katsuya
Information Technology Center Nagoya University
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SANGORRIN DANIEL
Graduate School of Information Science, Nagoya University
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Hara Yuko
Graduate School Of Information Science Nagoya University
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Ishii Katsuya
Department Of Applied Physics Faculty Of Engineering Nagoya University
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CHIKADA Shin-ichiro
Department of Information Engineering, the Graduate School of Information Science, Nagoya University
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WAKABAYASHI Takayuki
Department of Information and Computer Science, Toyohashi University of Technology
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Chikada Shin-ichiro
Department Of Information Engineering The Graduate School Of Information Science Nagoya University
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Wakabayashi Takayuki
Department Of Information And Computer Science Toyohashi University Of Technology
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Takada Hiroaki
College of Science and Engineering, Ritsumeikan University
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HARA Yuko
Information Technology Center, Nagoya University
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本田 晋也
Graduate School of Information Science, Nagoya University
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冨山 宏之
Graduate School of Information Science, Nagoya University
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SHIBATA Seiya
College of Science and Engineering, Ritsumeikan University
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Edahiro Masato
Graduate School of Information Science, Nagoya University
著作論文
- Embedded System Covalidation with RTOS Model and FPGA
- Effective hardware task context switching in Virtex-4 FPGAs (VLSI設計技術)
- Effective hardware task context switching in Virtex-4 FPGAs (コンピュータシステム)
- Effective hardware task context switching in Virtex-4 FPGAs (リコンフィギャラブルシステム)
- Integrated Scheduling in a Real-Time Embedded Hypervisor
- Partitioning of Behavioral Descriptions with Exploiting Function-Level Parallelism
- Function-Level Partitioning of Sequential Programs for Efficient Behavioral Synthesis
- Function Call Optimization for Efficient Behavioral Synthesis
- An RTOS-Based Design and Validation Methodology for Embedded Systems(System Programs)
- RTOS-Centric Cosimulator for Embedded System Design
- Automatic Communication Synthesis with Hardware Sharing for Multi-Processor SoC Design
- Preemptive Hardware Multitasking on Dynamically Partially Reconfigurable FPGAs : Hardware and Reconfiguration Layers
- A Fast Performance Estimation Framework for System-Level Design Space Exploration (System LSI Design Methodology Vol.5)
- A Novel Framework for Effective Preemptive Hardware Multitasking on FPGAs
- A Channel-based Communication/Synchronization Model for SW-HW Multitasking on Dynamically Partially Reconfigurable FPGAs