Suppression of Boron Penetration in P^+-Poly-Si Gate Metal-Oxide-Semiconductor Transistor Using Nitrogen Implantation
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概要
- 論文の詳細を見る
- 社団法人応用物理学会の論文
- 1997-03-30
著者
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Chao T
National Chiao Tung Univ. Hsinchu Twn
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Lei T
National Chiao Tung Univ. Hsinchu Twn
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Chao T‐s
Department Of Electrophysics National Chiao Tung University
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Chao Tien
National Device Laboratory
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CHAO T.
National Nano Device Laboratory
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CHANG C.
National Taiwan University Hospital
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CHU C.
National Taiwan University Hospital
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Lei Tan.
National Nano Device Laboratory:department Of Electronics Engineering And Institute Of Electronics N
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CHIEN C.
Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University
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HAO C.
Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University
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LIAW M.
National Nano Device Laboratories
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LEI T.
National Nano Device Laboratories
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SUN W.
Semiconductor Technology and Application Research (STAR) Group, Department of Electrical Engineering
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HSU C.
Semiconductor Technology and Application Research (STAR) Group, Department of Electrical Engineering
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Chang C
National Chiao Tung Univ. Twn
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Liaw M
National Nano Device Lab. Hsinchu Twn
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Hsu C.
Semiconductor Technology And Application Research (star) Group Department Of Electrical Engineering
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Chang C.
National Nano Device Laboratories
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Hao C.
Department Of Electronics Engineering And Institute Of Electronics National Chiao Tung University
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Chao T.S.
National Nano Device Laboratories
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Chien C.H.
Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University
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Hao C.P.
Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University
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