Mechanism of Chemical Mechanical Planarization Induced Edge Corrosion of Copper Line for Cu/Low-k SiOC Interconnects
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概要
- 論文の詳細を見る
- 2007-02-15
著者
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HSU Yung-Lung
VLSI Technology Laboratory, Institute of Microelectronics, Department of Electrical Engineering, Nat
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FANG Yean-Kuen
VLSI Technology Laboratory, Institute of Microelectronics, Department of Electrical Engineering, Nat
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CHIANG Yen-Ting
VLSI Technology Laboratory, Institute of Microelectronics, Department of Electrical Engineering, Nat
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CHOU Tse-Heng
VLSI Technology Laboratory, Institute of Microelectronics, Department of Electrical Engineering, Nat
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HONG Franklin
Department of Chemical Engineering National Cheng Kung University
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Hsu Yung-lung
Vlsi Technology Laboratory Institute Of Microelectronics Department Of Electrical Engineering Nation
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Chou Tse-heng
Vlsi Technology Laboratory Institute Of Microelectronics Department Of Electrical Engineering Nation
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Fang Yean-kuen
Vlsi Technology Laboratory Institute Of Microelectronics Department Of Electrical Engineering Nation
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Fang Yean-kuen
Vlsi Technology Lab. Institute Of Microelectronics Ee Department National Cheng Kung University No.
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Chiang Yen-ting
Vlsi Technology Laboratory Institute Of Microelectronics Department Of Electrical Engineering Nation
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Hong Franklin
Department of chemical engineering and Micro/Nano Science and Technology Center, National Cheng Kung University, 1 University Road, Tainan, Taiwan 701, Republic of China
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