High-Performance Buried-Gate Surrounding Gate Transistor for Future Three-Dimensional Devices
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概要
- 論文の詳細を見る
- 2004-10-15
著者
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Yamamoto Yasue
System Lsi Technology Development Center Corporate System Lsi Development Division Semiconductor Com
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Yamamoto Yasue
Research Institute Of Electrical Communication Tohoku University
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SAKURABA Hiroshi
Research Institute of Electrical Communication, Tohoku University
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MASUOKA Fujio
Research Institute of Electrical Communication, Tohoku University
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Endoh T
Tohoku Univ. Sendai‐shi Jpn
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Endoh T
Tohoku Univ. Sendai Jpn
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Endoh Tetsuo
Research Institute Of Electrical Communication Tohoku University
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Masuoka F
Tohoku Univ. Sendai Jpn
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Masuoka Fujio
Research Institute Of Electrical Communication Tohoku University
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Masuoka Fujio
The Reserch Institute Of Electrical Communication Tohoku University
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IWAI Makoto
Research Institute of Electrical Communication Tohoku University
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NISHI Ryohsuke
Research Institute of Electrical Communication Tohoku University
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Masuoka F
Research Institute Of Electrical Communication Tohoku University
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Sakuraba Hiroshi
Research Institute Of Electrical Communication Tohoku University
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Endoh T
Research Institute Of Electrical Communication Tohoku University
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