New Three-Dimensional High-Density Stacked-Surrounding Gate Transistor (S-SGT) Flash Memory Architecture Using Self-Aligned Interconnection Fabrication Technology without Photolithography Process for Tera-Bits and Beyond
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概要
- 論文の詳細を見る
New three-dimensional Stacked-Surrounding Gate Transistor (S-SGT) flash memory architecture can achieve the cell area of 3.88F2 per bit using the 0.2 μm design rule. The new architecture is realized by stacking two select transistors and two memory cells vertically on each pillar located in a two-dimensional array matrix. Each gate and each interconnection of this new architecture are fabricated by the vertical self-alignment process and horizontal self-alignment process simultaneously using HTO conformal deposition and reactive ion etching (RIE) without using the photolithography process. The new three-dimensional S-SGT flash memory architecture is applicable to high-density nonvolatile memories as large as tera-bits and beyond.
- Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
- 2004-04-15
著者
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Endoh Tetsuo
Research Institute Of Electrical Communication Tohoku University
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Masuoka Fujio
Research Institute Of Electrical Communication Tohoku University
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KINOSHITA Kazushi
Advanced Technology Development Center, Sharp Corporation
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YOKOYAMA Takashi
Research Institute of Electrical Communication, Tohoku University
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Sakuraba Hiroshi
Research Institute Of Electrical Communication Tohoku University
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Horii Shinji
Research Institute Of Electrical Communication Tohoku University
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Tanigami Takuji
Advanced Technology Development Center Sharp Corporation
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Sakiyama Keizou
Advanced Technology Development Center Sharp Corporation
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Saitoh Masahiro
Advanced Technology Development Center Sharp Corporation
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Masuoka Fujio
Research Institute of Electrical Communication, Tohoku University, 2-1-1 Katahira, Aoba-ku, Sendai 980-8577, Japan
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Yokoyama Takashi
Research Institute of Electrical Communication, Tohoku University, 2-1-1 Katahira, Aoba-ku, Sendai 980-8577, Japan
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Sakuraba Hiroshi
Research Institute of Electrical Communication, Tohoku University, 2-1-1 Katahira, Aoba-ku, Sendai 980-8577, Japan
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Endoh Tetsuo
Research Institute of Electrical Communication, Tohoku University, 2-1-1 Katahira, Aoba-ku, Sendai 980-8577, Japan
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Saitoh Masahiro
Advanced Technology Development Center, Sharp Corporation, 1 Asahi, Daimon-cho, Fukuyama, Hiroshima 721-8522, Japan
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Kinoshita Kazushi
Advanced Technology Development Center, Sharp Corporation, 1 Asahi, Daimon-cho, Fukuyama, Hiroshima 721-8522, Japan
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