Influence of Silicon Wafer Loading Ambient on Chemical Composition and Thickness Uniformity of Sub-5-nm-Thick Oxide Films : Surfaces, Interfaces, and Films

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概要

• 論文の詳細を見る
• 2001-12-15

著者

• Endoh Tetsuo

  Research Institute Of Electrical Communication Tohoku University

• Masuoka Fujio

  Research Institute Of Electrical Communication Tohoku University

• Kimura Y

  Research Institute Of Electrical Communication Tohoku University

• Kimura Yasutaka

  Research Institute Of Electrical Communication Tohoku University

• Lenski Markus

  Research Institute Of Electrical Communication Tohoku University

• ENDOH Tetsuo

  Research Institute of Electrical Communication, Tohoku University

関連論文

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• Hydrogen-Controlled Crystallinity of 3C-SiC Film on Si(001) Grown with Monomethylsilane
• Ge-Dot Formation on Si(111)-7 × 7 Surface with C Predeposition Using Monomethylsilane
• High-Performance Buried-Gate Surrounding Gate Transistor for Future Three-Dimensional Devices
• An Analysis of Program and Erase Mechanisms for Floating Channel Type Surrounding Gate Transistor Flash Memory Cells(Semiconductor Materials and Devices)
• New Three-Dimensional High-Density Stacked-Surrounding Gate Transistor (S-SGT) Flash Memory Architecture Using Self-Aligned Interconnection Fabrication Technology without Photolithography Process for Tera-Bits and Beyond
• Buried Gate Type SGT Flash Memory(The IEICE Transactions (published in Japanese) Vol. J86-C, No.5 (Electronics))
• Influence of Silicon Wafer Loading Ambient on Chemical Composition and Thickness Uniformity of Sub-5-nm-Thick Oxide Films : Surfaces, Interfaces, and Films
• The Analysis of the Stacked-Surrounding Gate Transistor(S-SGT)DRAM for the High Speed and Low Voltage Operation
• New Write/Erase Operation Technology for Flash EEPROM Cells to Improve the Read Disturb Characteristics
• New Reduction Mechanism of the Stress Leakage Current Based on the Deactivation of Step Tunneling Sites for Thin Oxide Films
• An Analytic Steady-State Current-Voltage Characteristics of Short Channel Fully-Depleted Surrounding Gate Transistor (FD-SGT) (Special Issue on New Concept Device and Novel Architecture LSIs)
• An Accurate Model of Fully-Depleted Surrounding Gate Transistor (FD-SGT) (Special Issue on New Concept Device and Novel Architecture LSIs)
• New α-Particle Induced Soft Error Mechanism in a Three Dimensional Capacitor Cell
• Physical Origin of Stress-Induced Leakage Currents in Ultra-Thin Silicon Dioxide Films(Ultra-Thin Gate Insulators,Fundamentals and Applications of Advanced Semiconductor Devices)
• Study of 30-nm Double-Gate MOSFET with Halo Implantation Technology Using a Two-Dimensional Device Simulator(Novel MOSFET Structures,Fundamentals and Applications of Advanced Semiconductor Devices)
• Thin-Film Deposition of Silicon-Incorporated Diamond-Like Carbon by Plasma-Enhanced Chemical Vapor Deposition Using Monomethylsilane as a Silicon Source
• Fabrication of Nanometer Silicon Pillars for Buried-Gate-Type Surrounding Gate Transistor by Silicon Quasi-Isotropic Etching
• Study of Self-Heating in Si Nano Structure for Floating Body-Surround Gate Transistor with High-$k$ Dielectric Films
• New Three-Dimensional High-Density Stacked-Surrounding Gate Transistor (S-SGT) Flash Memory Architecture Using Self-Aligned Interconnection Fabrication Technology without Photolithography Process for Tera-Bits and Beyond

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