New Three-Dimensional High-Density Stacked-Surrounding Gate Transistor (S-SGT) Flash Memory Architecture Using Self-Aligned Interconnection Fabrication Technology without Photolithography Process for Tera-Bits and Beyond
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概要
- 論文の詳細を見る
- 2004-04-30
著者
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SAKURABA Hiroshi
Research Institute of Electrical Communication, Tohoku University
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MASUOKA Fujio
Research Institute of Electrical Communication, Tohoku University
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Endoh Tetsuo
Research Institute Of Electrical Communication Tohoku University
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Masuoka F
Tohoku Univ. Sendai Jpn
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KINOSHITA Kazushi
Advanced Technology Development Center, Sharp Corporation
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TANIGAMI Takuji
Advanced Technology Development Center, Sharp Corporation
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YOKOYAMA Takashi
Research Institute of Electrical Communication, Tohoku University
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HORII Shinji
Research Institute of Electrical Communication, Tohoku University
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SAITOH Masahiro
Advanced Technology Development Center, Sharp Corporation
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SAKIYAMA Keizou
Advanced Technology Development Center, Sharp Corporation
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