Innovative Al Damascene Process for Nanoscale Interconnects
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概要
- 論文の詳細を見る
A novel chemical vapor deposition (CVD)-Al technique of "bottom-up growth" was developed using methylpyrrolidine alane as a precursor and a (PVD)-TiN/CVD-TiN stacked barrier in a damascene structure. Poor step coverage of PVD-TiN caused an absence of PVD-TiN at the bottom of trenches, resulting in selective Al growth. The new method filled a 40-nm-wide trench (aspect ratio = 7.5) completely and showed robust electrical properties. The lowest line resistance was obtained at a stacked layer of PVD-TiN/CVD-Ru due to the low resistivity of Ru. Furthermore, the fine Al line structure fabricated by the new technique revealed that the Al line structure did not suffer severely from the size effect, which started to affect Cu damascene structures that were 50 nm wide.
- Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
- 2006-04-30
著者
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Ryu Byung-il
Process Development Team Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Kim Sung-tae
Process Development Team Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Moon Joo-tae
Process Development Team Memory Division Samsung Electronics Co. Ltd.
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Chung U-in
Process Development Team Memory Division Samsung Electronics Co. Ltd.
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Kim Dae-yong
Process Development Team Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Yun Sera
Process Development Team Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Kim Byung
Process Development Team Semiconductor R & D Center Samsung Electronics Co. Ltd.
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Lee Sang
Process Development 2 Semiconductor R&d Center Samsung Electronics
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Hong Jong
Process Development Team Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Lee Sang
Process Development Team, Semiconductor R&D Center, Samsung Electronics Co., Ltd., San #24, Nongseo-Ri, Yongin-City, Kyungki-Do 449-900, Korea
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Choi Kyung-In
Process Development Team, Semiconductor R&D Center, Samsung Electronics Co., Ltd., San #24, Nongseo-Ri, Yongin-City, Kyungki-Do 449-900, Korea
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Han Sung-Ho
Process Development Team, Semiconductor R&D Center, Samsung Electronics Co., Ltd., San #24, Nongseo-Ri, Yongin-City, Kyungki-Do 449-900, Korea
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Choi Kyung-In
Process Development Team, Semiconductor R&D Center, Samsung Electronics Co., Ltd., San #24, Nongseo-Ri, Yongin-City, Kyungki-Do 449-900, Korea
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Kim Byung
Process Development Team, Semiconductor R&D Center, Samsung Electronics Co., Ltd., San #24, Nongseo-Ri, Yongin-City, Kyungki-Do 449-900, Korea
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Hong Jong
Process Development Team, Semiconductor R&D Center, Samsung Electronics Co., Ltd., San #24, Nongseo-Ri, Yongin-City, Kyungki-Do 449-900, Korea
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Han Sung-Ho
Process Development Team, Semiconductor R&D Center, Samsung Electronics Co., Ltd., San #24, Nongseo-Ri, Yongin-City, Kyungki-Do 449-900, Korea
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Kim Dae-Yong
Process Development Team, Semiconductor R&D Center, Samsung Electronics Co., Ltd., San #24, Nongseo-Ri, Yongin-City, Kyungki-Do 449-900, Korea
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Yun Sera
Process Development Team, Semiconductor R&D Center, Samsung Electronics Co., Ltd., San #24, Nongseo-Ri, Yongin-City, Kyungki-Do 449-900, Korea
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