Quantitative Evaluation of Interface Traps in a Nanometer-Thick SiGe/Si Heterostructure in Hetero MOS Devices(Session 1 Silicon Devices I,AWAD2006)

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概要

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• Recently-established low-temperature charge pumping (LTCP) technique is described, which is effective to quantitatively evaluate the interface trap density in nanometer-thick SiGe/Si heterostructures introduced in the channel region of Si MOSFETs. Hot carrier degradation at the hetero-interface is also described. The width of the hot-carrier-damaged hetero-interface region was estimated from experimental measurements by investigating and understanding the low-temperature charge pumping characteristics, and a quantitative estimate of the density of locally-generated hetero-interface traps was made.

• 社団法人電子情報通信学会の論文
• 2006-06-26

著者

• TSUCHIYA Toshiaki

  Interdisciplinary Faculty of Science and Engineering, Shimane University

• MUROTA Junichi

  Research Institute of Electrical Communication, Tohoku University

• SAKURABA Masao

  Research Institute for Electrical Communications, Tohoku University

• Sakuraba Masao

  Research Institute Of Electrical Communication Tohoku University

• Sakuraba Masao

  Research Institute For Electrical Communications Tohoku University

• Murota Junichi

  Research Institute Of Electrical Communication Tohoku University

• Murota Junichi

  Research Institute For Electrical Communications Tohoku University

• Tsuchiya Toshiaki

  Interdisciplinary Faculty Of Science And Engineering Shimane University

関連論文

• Low-Frequency Noise in Si_Ge_x p-Channel Metal Oxide Semiconductor Field-Effect Transistors : Semiconductors
• Separation by Bonding Si Islands (SBSI) for Advanced CMOS LSI Applications(Si Devices and Processes, Fundamental and Application of Advanced Semiconductor Devices)
• Self-Diffusion in Intrinsic and Extrinsic Silicon Using Isotopically Pure ^Silicon/Natural Silicon Heterostructures
• Epitaxial Growth of Pure ^Si Layers on a Natural Si(100) Substrate Using Enriched ^SiH_4
• Influence of Doping Gradient near a Channel End on Parasitic Series Resistance of Thin-Film Fully-Depleted Metal-Oxide-Semiconductor Field-Effect Transistors
• Body-Charge-Induced Switching Characteristics in Fully Depleted Silicon-on-Insulator Digital Circuits
• Light Emission from Si-Metal-Oxide-Semiconductor Tunnel Junctions
• Grating-Coupled Light Emission from the Slow Mode of Metal-Insulator-Metal Tunnel Junctions
• Grain-Boundary Related Hot Carrier Degradation Mechanism in Low-Temperature Polycrystalline Silicon Thin-Film Transistors
• Impact of Hot Carrier Stress on Low-Frequency Noise Characteristics in Floating-Body Silicon-on-Insulator Metal Oxide Semiconductor Field-Effect Transistors
• Impact of Hot Carrier Stress on Low-Frequency Noise Characteristics in Floating-Body SOI MOSFETs
• Selective Ge CVD as a Via Hole Filling Method and Self-Aligned Impurity Diffusion Microsource in Si Processing (SOLID STATE DEVICES AND MATERIALS 1)
• Second Harmonic Generation from Si_Ge_x Epitaxial Films with a Vicinal Face:Film Thickness Dependence
• Optical Second Harmonic Generation in Si_Ge_x Film Epitaxially Grown on Si(100)
• Water-Related Instability in Low-Temperature Polycrystalline Silicon Thin-Film Transistors Caused by Self-Heating
• Quantitative Evaluation of Interface Traps in a Nanometer-Thick SiGe/Si Heterostructure in Hetero MOS Devices(Session 1 Silicon Devices I,AWAD2006)
• Quantitative Evaluation of Interface Traps in a Nanometer-Thick SiGe/Si Heterostructure in Hetero MOS Devices(Session 1 Silicon Devices I,AWAD2006)
• Direct Observation of Fluctuations in the Number and Individual Electronic Properties of Interface Traps in Nanoscale Metal–Oxide–Semiconductor Field-Effect Transistors
• Second Harmonic Generation from Si1-xGex Epitaxial Films with a Vicinal Face: Film Thickness Dependence
• The Generation Process of Interface Traps by Hot-Carrier Injection in Nanoscale Metal-Oxide-Semiconductor Field-Effect Transistors (Special Issue : Solid State Devices and Materials (1))
• Self-Diffusion in Intrinsic and Extrinsic Silicon Using Isotopically Pure 30Silicon/Natural Silicon Heterostructures
• Channel Length and Time Dependent Interface Trap Generation near the Source Due to Hot-Carrier Injection in Metal--Oxide--Semiconductor Field-Effect Transistors
• Grain-Boundary Related Hot Carrier Degradation Mechanism in Low-Temperature Polycrystalline Silicon Thin-Film Transistors
• The Effect of Thick Interconnections Formed by Gold Electroplating on the Characteristics of Metal–Oxide–Semiconductor Field-Effect Transistors
• Influence of Doping Gradient near a Channel End on Parasitic Series Resistance of Thin-Film Fully-Depleted Metal–Oxide–Semiconductor Field-Effect Transistors
• Influences of Grain Boundaries on Temperature Dependence of Device Characteristics and on Hot Carrier Effects in Low-Temperature Polycrystalline Silicon Thin Film Transistors Containing Large Grains
• Hot Carrier Degradation of SiGe/Si Heterointerface and Experimental Estimation of Density of Locally Generated Heterointerface Traps
• Body-Charge-Induced Switching Characteristics in Fully Depleted Silicon-on-Insulator Digital Circuits
• X-Ray Photoemission Study of SiO2/Si/Si0.55Ge0.45/Si Heterostructures

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