Murota Junichi | Research Institute Of Electrical Communication Tohoku University

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概要

• 同名の論文著者
• Research Institute Of Electrical Communication Tohoku Universityの論文著者

関連著者

• MUROTA Junichi

  Research Institute of Electrical Communication, Tohoku University

• Murota Junichi

  Research Institute Of Electrical Communication Tohoku University

• Murota Junichi

  Research Institute For Electrical Communications Tohoku University

• TSUCHIYA Toshiaki

  Interdisciplinary Faculty of Science and Engineering, Shimane University

• SAKURABA Masao

  Research Institute for Electrical Communications, Tohoku University

• Sakuraba Masao

  Research Institute Of Electrical Communication Tohoku University

• Sakuraba Masao

  Research Institute For Electrical Communications Tohoku University

• Tsuchiya Toshiaki

  Interdisciplinary Faculty Of Science And Engineering Shimane University

• Mikoshiba Nobuo

  Research Institute Of Electrical Communication Tohoku University:(present Address) Hewlett-packard L

• Mikoshiba Nobuo

  Research Institute Of Electrical Communication Tohoku University

• Kohlhase Armin

  Research Institute Of Electrical Communication Tohoku University:siemens Semiconductor Technology Si

• CHENG Min-Lin

  Research Institute of Electrical Communication, Tohoku University

• SATO Taketoshi

  Research Institute of Electrical Communication, Tohoku University

• KOBAYASHI Shin-ichi

  Research Institute of Electrical Communication, Tohoku University

• Cheng Min-lin

  Research Institute Of Electrical Communication Tohoku University

• Mikoshiba Nobuo

  Research Institute Of Electorical Communication Tohoku University

• Sato Taketoshi

  Research Institute Of Electrical Communication Tohoku University:kokusai Electric Co. Ltd. Semicon.

• Kobayashi Shin-ichi

  Research Institute Of Electrical Communication Tohoku University

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著作論文

• Selective Ge CVD as a Via Hole Filling Method and Self-Aligned Impurity Diffusion Microsource in Si Processing (SOLID STATE DEVICES AND MATERIALS 1)
• Quantitative Evaluation of Interface Traps in a Nanometer-Thick SiGe/Si Heterostructure in Hetero MOS Devices(Session 1 Silicon Devices I,AWAD2006)
• Quantitative Evaluation of Interface Traps in a Nanometer-Thick SiGe/Si Heterostructure in Hetero MOS Devices(Session 1 Silicon Devices I,AWAD2006)

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