A 2-V_<pp> Linear Input-Range Fully Balanced CMOS Transconductor and Its Application to a 2.5-V 2.5-MHz Gm-C LPF
スポンサーリンク
概要
- 論文の詳細を見る
A fully balanced (FB) transconductor using two multi-input single-ended (SE) CMOS transconductors is proposed, where the transconductors use MOS transitors operating in a triode region for achieving a wide linear input-range. SE circuits are easier to design than differential circuits and inherently reject common-mode (CM signals. The multi-input structure is used to make a CM feedback loop and to determine an output CM voltage. A output-resistance current mirror is used in converting a differential signal to a single-ended signal in order to achieve a high common-mode rejection ratio (CMRR) and a high output-resistance of the transconductor. The FB transconductor achieves a 2-V_<pp> linear input range at a 2.5-V power supply and consumes 1.74mA. The output resistance of the FB transconductor is 2MΩ. It operates at 2V with a linear input-range of 1.2V_<pp> and at 1.6V with a linear input-range of 0.9V_<pp>. A2.5-V 2.5-MHz FB Gm-C filter using the FB transconductors achieved a CMRR of 45dB and a passband IIP3 of 32dBm.
- 社団法人電子情報通信学会の論文
- 2000-11-25
著者
-
TSURUMI Hiroshi
Toshiba Corp.
-
Iida T
Pioneer Corp. Saitama Jpn
-
Arai Tadashi
Semiconductor Campany Toshiba Corporation
-
Ueno T
Toxicological Research Center Nitto Denko Corporation
-
ITAKURA Tetsuro
Corporate Research & Development Center, Toshiba Corporation
-
Itakura Tetsuro
Corporate Research & Developmentcenter Toshiba Corporation
-
Tsurumi Hiroshi
Toshiba Corp. Kawasaki‐shi Jpn
-
Tanimoto Hiroshi
The Department Of Electrical And Electronic Engineering Kitami Institute Of Technology
-
Arai Tadashi
Semiconductor Company Toshiba Corporation
-
Ueno Takashi
Dept. of Biochemistry, Juntendo University, School of medicine
-
Arai Tadashi
Toshiba Corp. Yokohama‐shi Jpn
-
Tanimoto Hiroshi
The Corporate Research & Development Center Toshiba Corporation:(present Address) The Department
-
Arai T
Semiconductor Campany Toshiba Corporation
-
UENO Takashi
Corporate Research & DevelopmentCenter, Toshiba Corporation
-
ARAI Tadashi
System LSI Division, Semiconductor Company, Toshiba Corporation
-
Tanimoto H
Toshiba Corp. Kawasaki‐shi Jpn
-
Ueno T
Toshiba Corp. Kawasaki‐shi Jpn
関連論文
- A Single-Chip 8-Band CMOS Transceiver for 3G Cellular Systems with Digital Interface
- BD-Type Write-Once Disk with Pollutant-Free Material and Starch Substrate
- Performance of an Electron Beam Recorder for Disk Mastering (Invited Paper)
- Characterization of CAA0225, a Novel Inhibitor Specific for Cathepsin L, as a Probe for Autophagic Proteolysis(Biochemistry)
- Differentiation-specific expression and localization of an autophagosomal marker protein (LC3) in human epidermal keratinocytes
- A Fast f_c Automatic Tuning Circuit with Wide Tuning Range for WCDMA Direct Conversion Receiver Systems(Analog Circuits and Related SoC Integration Technologies)
- A Direct Conversion Receiver for W-CDMA Reducing Current Consumption to 31 mA(RF, Analog Circuit and Device Technologies)
- Phase Compensation Technique for a Low-Power Transconductor(Building Block, Analog Circuit and Device Technologies)
- Phase Compensation Techniques for Low-Power Operational Amplifiers
- Fully Differential Direct-Conversion Receiver for W-CDMA Reducing DC-Offset Variation(Analog Circuit and Device Technologies)
- Design Study on RF Stage for Miniature PHS Terminal (Special Issue on Microwave Devices for Mobile Communications)
- Electron microscopical and immunohistochemical studies on the localization of cathepsin B, D, L, LAMP-1 and μ-calpain in developing hair follicles
- Localization of Cathepsins B, D, L, LAMP-1 and μ-Calpain in Developing Hair Follicles
- P-10 Localization of Cathepsin B and μ Calpain in Hair Follicles of Neonatal Rats.
- A Single-Chip 8-Band CMOS Transceiver for 3G Cellular Systems with Digital Interface
- A Low Offset 1.9-GHz Direct Conversion Receiver IC with Spurious Free Dynamic Range of over 67 dB (Special Section on Analog Circuit Techniques Supporting the System LSI Era)
- A 1.9-GHz Direct Conversion Transmitter IC with Low Power On-Chip Frequency Doubler (Special Section on Analog Circuit Techniques and Related Topics)
- A 1.5 GHz CMOS Low Noise Amplifier
- A Low-Noise Amplifier for WCDMA Terminal with High Tolerance for Leakage Signal from Transmitter
- A 900-MHz Low-Noise Amplifier with High Tolerance for Noise Degradation due to a Leakage Signal from a Transmitter
- 1.9 GHz Si Direct Conversion Receiver IC for QPSK Modulation Systems (Special Issue on Microwave Devices for Mobile Communications)
- High-Density Groove Mastering Using an Electron Beam Recorder and Plasma Etching Process
- A 1.2-V, 12-bit, 200MSample/s Current-Steering D/A Converter in 90-nm CMOS(Analog Circuit Techniques and Related Topics)
- A Digital-to-RF Converter Architecture Suitable for a Digital-to-RF Direct-Conversion Software Defined Radio Transmitter(Special Issue on Software Defined Radio and Its Technologies)
- Broadband and Flexible Receiver Architecture for Software Defined Radio Terminal Using Direct Conversion and Low-IF Principle(Special Issue on Software Defined Radio and Its Technologies)
- Electron Beam Recording beyond 200Gbit/in^2 Density for Next Generation Optical Disk Mastering
- A Triple-Band WCDMA Direct Conversion Receiver IC with Reduced Number of Off-Chip Components and Digital Baseband Control Signals
- A Low-Power Low-Noise Clock Signal Generator for Next-Generation Mobile Wireless Terminals
- Inhibition of hepatitis C virus replication by chloroquine targeting virus-associated autophagy
- A 2-V_ Linear Input-Range Fully Balanced CMOS Transconductor and Its Application to a 2.5-V 2.5-MHz Gm-C LPF
- A Simple Modeling Technique for Symmetric Inductors(Devices and Circuits for Next Generation Multi-Media Communication Systems)
- A Direct Conversion Receiver Adopting Balanced Three-Phase Analog System
- Design Considerations for RC Polyphase Filters with Simultaneously Equal Ripple Both in Stopband and Passband( Analog Circuit Techniques and Related Topics)
- System-Level Compensation Approach to Overcome Signal Saturation, DC Offset, and 2nd-Order Nonlinear Distortion in Linear Direct Conversion Receiver (Special Issue on Low Distortion Technology for Microwave Devices and Circuits)
- Design of Fully Balanced Analog Systems Based on Ordinary and/or Modified Single-Ended Opamps (Special Section on Analog Circuit Techniques and Related Topics)
- 1.2V, 24mW/ch, 10bit, 80MSample/s Pipelined A/D Converters
- Relationship between Amount of β-Blockers Permeating through the Stratum Corneum and Skin Irritation after Application of β-Blocker Adhesive Patches to Guinea Pig Skin
- Relationship between the Amount of Propranolol Permeating through the Stratum Corneum of Guinea Pig Skin after Application of Propranolol Adhesive Patches and Skin Irritation
- Extinction of Organelles in Differentiating Epidermis
- Development of Thermal-hydraulic Computer Code for Steam Generator
- Advanced Boron Soaking Procedure for Steam Generators
- Threshold Controlling Scheme for Adaptive Modulation and Coding System(Wireless Communication Technologies)
- A 0.9V 1.5mW Continuous-Time ΔΣ Modulator for W-CDMA(Analog Circuit Techniques and Related Topics)
- A Two-Gain-Stage Amplifier without an On-Chip Miller Capacitor in an LCD Driver IC
- A 380-MHz CMOS Linear-in-dB Variable Gain Amplifier with Gain Compensation Techniques for CDMA Systems
- A Gm-C Filter Using Multiple-Output Linearized Transconductors(Analog Circuit Techniques and Related Topics)
- A 380-MHz CMOS Linear-in-dB Variable Gain Amplifier with Gain Compensation Techniques for CDMA Systems(Devices and Circuits for Next Generation Multi-Media Communication Systems)
- A 2-GHz Down-Converter with 3-dB Bandwidth of 600 MHz Using LO Signal Suppressing Output Buffer(Special Section on Analog Circuit Techniques and Related Topics)
- A 36-mW 1.5-GS/s 7-Bit Time-Interleaved SAR ADC Using Source Follower Based Track-and-Hold Circuit in 65-nm CMOS
- Exact Design of RC Polyphase Filters and Related Issues