A 1.9-GHz Direct Conversion Transmitter IC with Low Power On-Chip Frequency Doubler (Special Section on Analog Circuit Techniques and Related Topics)

概要

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A direct conversion transmitter IC including a proposed frequency doubler, a quadrature modulator, and a 3-bit variable attenuator was fabricated using BiCMOS technology with f_T of 12 GHz. This architecture employing frequency doubler is intended for realizing wireless terminals that are low in cost and small in size. The architecture is effective for reducing serious interference between PA and VCO by making the VCO frequency different from that of PA. The proposed frequency doubler comprises a current-driven 90° phase-shifter and an ECL-EXOR circuit for both low power operation and wide input power range of local oscillator (LO). The proposed frequency doubler keeps high output power even when rectangular wave from LO is applied owing to use of the current-driven 90° phase-shifter instead of a voltage-driven 90° phase-shifter. An LO leakage of less than -25dBc, an image rejection ratio in excess of 45 dBc, and a maximum attenuation of 21 dB were measured. The transmitter IC successfully operates at LO power above -15 dBm and consumes 68 mA from 2.7V power supply voltage. An active die size is 1.5 mm×3 mm.
社団法人電子情報通信学会の論文
1999-02-25