Phase Compensation Techniques for Low-Power Operational Amplifiers
スポンサーリンク
概要
- 論文の詳細を見る
An operational amplifier is one of the key functional blocks and is widely used in analog and mixed-signal circuits. For low-power consumption, many techniques such as class AB and slew-rate enhancement have been proposed. Although phase compensation is related to power consumption, it has not been clearly discussed from the viewpoint of the power consumption. In this paper, the conventional and the improved Miller compensations and the phase compensation by introducing a new zero are dicussed for low-power operational amplifiers.
- 2010-06-01
著者
-
ITAKURA Tetsuro
Corporate Research & Development Center, Toshiba Corporation
-
Ito Rui
System Lsi Division Analog Device Design Dept. Toshiba Corporation Semiconductor Company
-
ITAKURA Tetsuro
Corporate Research & Development Center, Toshiba Corporation
関連論文
- A Fast f_c Automatic Tuning Circuit with Wide Tuning Range for WCDMA Direct Conversion Receiver Systems(Analog Circuits and Related SoC Integration Technologies)
- A Direct Conversion Receiver for W-CDMA Reducing Current Consumption to 31 mA(RF, Analog Circuit and Device Technologies)
- Phase Compensation Technique for a Low-Power Transconductor(Building Block, Analog Circuit and Device Technologies)
- Phase Compensation Techniques for Low-Power Operational Amplifiers
- A 1.2-V, 12-bit, 200MSample/s Current-Steering D/A Converter in 90-nm CMOS(Analog Circuit Techniques and Related Topics)
- A Low-Power Low-Noise Clock Signal Generator for Next-Generation Mobile Wireless Terminals
- A 2-V_ Linear Input-Range Fully Balanced CMOS Transconductor and Its Application to a 2.5-V 2.5-MHz Gm-C LPF
- A Simple Modeling Technique for Symmetric Inductors(Devices and Circuits for Next Generation Multi-Media Communication Systems)
- A Direct Conversion Receiver Adopting Balanced Three-Phase Analog System
- 1.2V, 24mW/ch, 10bit, 80MSample/s Pipelined A/D Converters
- A 0.9V 1.5mW Continuous-Time ΔΣ Modulator for W-CDMA(Analog Circuit Techniques and Related Topics)
- A Two-Gain-Stage Amplifier without an On-Chip Miller Capacitor in an LCD Driver IC
- A 380-MHz CMOS Linear-in-dB Variable Gain Amplifier with Gain Compensation Techniques for CDMA Systems
- A Gm-C Filter Using Multiple-Output Linearized Transconductors(Analog Circuit Techniques and Related Topics)
- A 380-MHz CMOS Linear-in-dB Variable Gain Amplifier with Gain Compensation Techniques for CDMA Systems(Devices and Circuits for Next Generation Multi-Media Communication Systems)
- A 2-GHz Down-Converter with 3-dB Bandwidth of 600 MHz Using LO Signal Suppressing Output Buffer(Special Section on Analog Circuit Techniques and Related Topics)
- A 36-mW 1.5-GS/s 7-Bit Time-Interleaved SAR ADC Using Source Follower Based Track-and-Hold Circuit in 65-nm CMOS