A 1.2-V, 12-bit, 200MSample/s Current-Steering D/A Converter in 90-nm CMOS(<Special Section>Analog Circuit Techniques and Related Topics)
スポンサーリンク
概要
- 論文の詳細を見る
This paper describes a 1.2-V, 12-bit, 200-MSample/s current-steering CMOS digital-to-analog (D/A) converter for wireless-communication terminals. To our knowledge, the supply voltage of this converter is the lowest for high-speed applications. To overcome increasing device mismatch in low-voltage operation, we propose an H-shaped, 3-dimensional structure for reducing influence of voltage drops (IR drops) along power supplies. This technique relaxes mismatch requirements and allows use of small devices with small parasitics. By using this technique, a low-voltage, high-speed D/A converter was realized. The converter was implemented in a 90-nm CMOS technology. The modulator achieves the intrinsic accuracy of 12 bits and a spurious-free dynamic range (SFDR) above 55dB over a 100-MHz bandwidth.
- 2007-02-01
著者
-
ITAKURA Tetsuro
Corporate Research & Development Center, Toshiba Corporation
-
Itakura Tetsuro
Toshiba Corp. Kawasaki‐shi Jpn
-
Ueno Takeshi
Corporate Research And Development Center Toshiba Corporation
-
YAMAJI Takafumi
Corporate Research and Development Center, Toshiba Corporation
-
Ueno Takeshi
Corporate Research & Development Center Toshiba Corporation
-
Yamaji Takafumi
Corporate Research And Development Center Toshiba Corporation
-
Yamaji Takafumi
Corporate Research & Development Center Toshiba Corp.
関連論文
- A Fast f_c Automatic Tuning Circuit with Wide Tuning Range for WCDMA Direct Conversion Receiver Systems(Analog Circuits and Related SoC Integration Technologies)
- A Direct Conversion Receiver for W-CDMA Reducing Current Consumption to 31 mA(RF, Analog Circuit and Device Technologies)
- Phase Compensation Technique for a Low-Power Transconductor(Building Block, Analog Circuit and Device Technologies)
- Phase Compensation Techniques for Low-Power Operational Amplifiers
- A Novel Automatic Quality Factor Tuning Scheme for a Low-Power Wideband Active-RC Filter
- 1.9 GHz Si Direct Conversion Receiver IC for QPSK Modulation Systems (Special Issue on Microwave Devices for Mobile Communications)
- A 1.2-V, 12-bit, 200MSample/s Current-Steering D/A Converter in 90-nm CMOS(Analog Circuit Techniques and Related Topics)
- A Low-Power Low-Noise Clock Signal Generator for Next-Generation Mobile Wireless Terminals
- A 2-V_ Linear Input-Range Fully Balanced CMOS Transconductor and Its Application to a 2.5-V 2.5-MHz Gm-C LPF
- Low Output Offset,8-bit Signal Driver ICs for XGA/SVGA TFT-LCDs (特集高性能アナログ電子回路)
- A Simple Modeling Technique for Symmetric Inductors(Devices and Circuits for Next Generation Multi-Media Communication Systems)
- A Direct Conversion Receiver Adopting Balanced Three-Phase Analog System
- 55-mW, 1.2-V, 12-bit, 100-MSPS Pipeline ADCs for Wireless Receivers
- 1.2V, 24mW/ch, 10bit, 80MSample/s Pipelined A/D Converters
- Low-Power Design of 10-bit 80-MSPS Pipeline ADCs(Analog Signal Processing)
- A 0.9V 1.5mW Continuous-Time ΔΣ Modulator for W-CDMA(Analog Circuit Techniques and Related Topics)
- Nonlinear Analysis of Bipolar Harmonic Mixer for Direct Conversion Receivers(RF, Analog Circuit and Device Technologies)
- A Two-Gain-Stage Amplifier without an On-Chip Miller Capacitor in an LCD Driver IC
- A 380-MHz CMOS Linear-in-dB Variable Gain Amplifier with Gain Compensation Techniques for CDMA Systems
- A Gm-C Filter Using Multiple-Output Linearized Transconductors(Analog Circuit Techniques and Related Topics)
- A 380-MHz CMOS Linear-in-dB Variable Gain Amplifier with Gain Compensation Techniques for CDMA Systems(Devices and Circuits for Next Generation Multi-Media Communication Systems)
- A 2-GHz Down-Converter with 3-dB Bandwidth of 600 MHz Using LO Signal Suppressing Output Buffer(Special Section on Analog Circuit Techniques and Related Topics)
- A 36-mW 1.5-GS/s 7-Bit Time-Interleaved SAR ADC Using Source Follower Based Track-and-Hold Circuit in 65-nm CMOS