Highly Thermal Immune Nitrogen-Doped Ni–Germanosilicide with Co/TiN Double Layer for Nano-Scale Complementary Metal Oxide Semiconductor Applications
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概要
- 論文の詳細を見る
In this study, a highly thermal immune Ni–germanosilicide utilizing a 1%-nitrogen-doped nickel and a Co/TiN double capping layer is proposed for nano-scale complementary metal oxide semiconductor field effect transistors (CMOSFETs). It is shown that thermal stability of Ni–germanosilicide is improved a lot by the nitrogen incorporation in Ni–germanosilicide film using the 1%-nitrogen-doped nickel target and Co/TiN double capping layer. Even after the post-silicidation annealing at 600 °C for 30 min, low resistivity Ni–germanosilicide can be achieved. It is believed that the nitrogen atoms in 1%-nitrogen-doped nickel are incorporated in the Ni–germanosilicide during silicidation and formed a nitride compound at the grain boundaries of Ni–germanosilicide and the Ni–germanosilicide/SiGe interface.
- 2006-04-30
著者
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YUN Jang-Gn
Department of Electronics Engineering, Chungnam National University
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OH Soon-Young
Department of Electronics Engineering, Chungnam National University
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Kim Yong-Jin
Department of Internal Medicine, Cardiovascular Center, Seoul National University Hospital
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Lee Hi-deok
Department Of Electronics Engineering Chungnam National University
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Wang Jin-suk
Department Of Electronics Engineering Chungnam National University
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Lee Won-jae
Department Of Advanced Materials Engineering Dong-eui University
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CHA Han-Seob
R&D Center, MagnaChip Semiconductor Ltd.
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Kim Do-woo
Department Of Digital Design Korea Women's Polytechnic
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Ji Hee-hwan
Department Of Electronics Engineering Chungnam National University
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Lee Hi-Deok
Department of Electronics Engineering, Chungnam National University, 220 Gung-Dong, Yuseong-gu, Daejeon 305-764, Korea
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Cho Yoo-Jeong
Department of Materials Engineering, Korea University of Technology and Education, Chungnam 330-708, Korea
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Tuya Agchbayar
Department of Electronics Engineering, Chungnam National University, 220 Gung-dong, Yuseong-gu, Daejeon 305-764, Korea
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Han Kil-Jin
Department of Materials Engineering, Korea University of Technology and Education, Chungnam 330-708, Korea
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Kim Yeong-Cheul
Department of Materials Engineering, Korea University of Technology and Education, Chungnam 330-708, Korea
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Wang Jin-Suk
Department of Electronics Engineering, Chungnam National University, 220 Gung-dong, Yuseong-gu, Daejeon 305-764, Korea
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Kim Yong-Jin
Department of Electronics Engineering, Chungnam National University, 220 Gung-Dong, Yuseong-gu, Daejeon 305-764, Korea
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Lee Won-Jae
Department of Electronics Engineering, Chungnam National University, 220 Gung-dong, Yuseong-gu, Daejeon 305-764, Korea
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Kim Do-Woo
Department of Electronics Engineering, Chungnam National University, 220 Gung-dong, Yuseong-gu, Daejeon 305-764, Korea
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Ji Hee-Hwan
Department of Electronics Engineering, Chungnam National University, 220 Gung-Dong, Yuseong-gu, Daejeon 305-764, Korea
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Yun Jang-Gn
Department of Electronics Engineering, Chungnam National University, 220 Gung-Dong, Yuseong-gu, Daejeon 305-764, Korea
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Oh Soon-Young
Department of Electronics Engineering, Chungnam National University, 220 Gung-Dong, Yuseong-gu, Daejeon 305-764, Korea
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Cha Han-Seob
R&D Center, MagnaChip Semiconductor Ltd., Hyangjeong, Hungduk-gu, Cheongju, Choongbuk 361-725, Korea
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