Evaluation of Device Configurations through Cross-Sectional Planes along Gates of 0.1 μm Metal–Oxide–Semiconductor Field-Effect Transistors by Scanning Tunneling Microscopy/Scanning Tunneling Spectroscopy
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概要
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Scanning tunneling microscopy/scanning tunneling spectroscopy (STM/STS) has been used to evaluate device configurations along the gate through longitudinal cross sections of 0.1 μm metal–oxide–semiconductor field-effect transistors (MOSFETs). It is found that the STM images taken from the longitudinal cross sections of MOSFETs are classified into four groups according to the device configuration expected on the longitudinal cross sections, i.e., cross-sectional planes prepared by cutting off the samples at the source/drain, the channel, and the two spacers surrounding both sides of the gate. Among them, STM/STS observation of the longitudinal cross sections of MOSFETs cut off at a spacer visualizes actual structures of the sides of the gate and the spacer, in particular, fluctuations in device structure along the gate, at a resolution suitable for nanoscale devices.
- Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
- 2006-03-15
著者
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Asahi Hajime
The Institute Of Scientific And Industrial Research Osaha University
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Hasegawa Shigehiko
The Institute Of Scientific And Industrial Research Osaka University
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Yabuuchi Atsushi
The Institute of Scientific and Industrial Research, Osaka University, 8-1 Mihogaoka, Ibaraki, Osaka 567-0047, Japan
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Doi Wataru
The Institute of Scientific and Industrial Research, Osaka University, 8-1 Mihogaoka, Ibaraki, Osaka 567-0047, Japan
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