Low switching loss power MOSFET with dual gate structure (Electron devices: 第15回先端半導体デバイスの基礎と応用に関するアジア・太平洋ワークショップ(AWAD2007))

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概要

• 論文の詳細を見る

• Low gate charge power vertical double-diffused MOSFET devices are required for high frequency circuit system. In this study, we proposed a power MOSFET structure with a dual gate structure which realizes the small gate charge without significantly degrading breakdown voltage. The dual gate eliminates partial gate area which effects switching speed and switching loss strongly. The dual gate structure features the formation of removed gate area portion combining with the additional np-region at the surface of the n drift layer. Reduction of the gate charge results in an improvement of switching performance. The gate charge and the figure of merit of the dual gate with np-region cell structure are reduced 49% and 33% compared with those of the conventional cell, respectively.

• 社団法人電子情報通信学会の論文
• 2007-06-18

著者

• Tsai Yao-tsung

  Dep. Of Electrical Engineering National Central University

• Chien Feng‐tso

  Dep. Of Electronic Engineering Feng Chia University

• Chien Feng-tso

  Department Of Electronic Engineering Feng Chia University

• Chien Feng-tso

  The R&d Dept. Chino-excel Technology Corp.:the Department Of Electrical Engineering Feng Chia Un

• Liao Chien-nan

  Dept. Of Electrical Engineering National Central University

• Liao Chien-nan

  Department Of Electrical Engineering National Central University

• Tsai Yao-Tsung

  Department of Electrical Engineering, National Central University

• Tsai Yao-tsung

  Dept. Of Electrical Engineering National Central University

• Tsai Yao-tsung.

  Department Of Electrical Engineering National Central University

• Fang Chin-mu

  Department Of Electronic Engineering Feng-chia University

• Fang Chin-mu

  Dept. Of Electronic Engineering Feng-chia University

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