The Study of Drain Alloy Time and Temperature for Antimony Substrate Vertical High Voltage Power MOSFETs(Session 6B Power Devices,AWAD2006)

スポンサーリンク

概要

• 論文の詳細を見る

• Low voltage vertical Power MOSFETs employ the substrates doped by Arsenic (As) for low on-resistance issue. However, those substrates lead to un-uniformity breakdown problem for high voltage (HV) epitaxy (low concentration) caused by the out-doping phenomenon under processing. In this study, we use the antimony-doped (Sb) substrate to avoid this drawback for HV devices. However, devices fabricated with Sb-doped substrate show a higher source-drain turn on voltage (V_<SD>) owing to a higher drain contact resistance, which increase power loss than the As doped devices under device switching. To lower the V_<SD>, we bake the devices with different temperature and time conditions and investigate the V_<SD> characteristics. It is shown that the V_<SD> can be reduced 35 % at 350℃ with 6 hours conditions.

• 社団法人電子情報通信学会の論文
• 2006-06-26

著者

• Wang Chi

  Dept. Of Electronic Engineering Feng Chia University

• Liao Chien

  Dep. Of Electrical Engineering National Central University

• LIAO Chien-Nan

  Dept. of Electrical Engineering, National Central University

• CHIEN Feng-Tso

  Dept. of Electronic Engineering, Feng Chia University

• WANG Chi-Ling

  Dept. of Electronic Engineering, Feng Chia University

• Chien Feng‐tso

  Dep. Of Electronic Engineering Feng Chia University

• Chien Feng-tsun

  Dept. Of Electronics Engineering National Chiao Tung University

• Chien Feng-tso

  The R&d Dept. Chino-excel Technology Corp.:the Department Of Electrical Engineering Feng Chia Un

• Liao Chien-nan

  Dept. Of Electrical Engineering National Central University

• Liao Chien-nan

  Department Of Electrical Engineering National Central University

• Fang Chin-mu

  Department Of Electronic Engineering Feng-chia University

• Fang Chin-mu

  Dept. Of Electronic Engineering Feng-chia University

関連論文

• A Novel Power MOSFET Structure with Shallow Junction Dual Well Design(Compound Semiconductor and Power Devices,Fundamentals and Applications of Advanced Semiconductor Devices)
• High Current, High Power, and High Linearity Ohmic Recess InGaP/InGaAs Doped Channel FETs(Session 7B Compound Semiconductor Devices III,AWAD2006)
• High Current, High Power, and High Linearity Ohmic Recess InGaP/InGaAs Doped Channel FETs(Session 7B Compound Semiconductor Devices III)
• High Current, High Power, and High Linearity Ohmic Recess InGaP/InGaAs Doped Channel FETs
• High Performance Power MOSFETs by Wing-Cell Structure Design(Si Devices and Processes,Fundamental and Application of Advanced Semiconductor Devices)
• High Performance Power MOSFETs by Wing-cell Structure Design (先端デバイスの基礎と応用に関するアジアワークショップ(AWAD2005))
• High Performance Power MOSFETs by Wing-cell Structure Design (先端デバイスの基礎と応用に関するアジアワークショップ(AWAD2005))
• Device Linearity and Gate Voltage Swing Improvement by Al_Ga_As/In_Ga_As Double Doped-Channel Design (Joint Special Issue on Heterostructure Microelectronics with TWHM 2000)
• High Ruggedness Power MOSFET Design by a Self-Align p^+ Process(Power Devices, Fundamental and Application of Advanced Semiconductor Devices)
• A Novel High Ruggedness Power MOSFET With a Planar Oxide Deep P+ Implant Structure
• InGaP/InGaAs DCFETs with Drain and Source Recess Process
• High Ruggedness Power MOSFET Design by a Self-Align P+ Process(Session A7 High Power Devices)(2004 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices (AWAD 2004))
• Boron Penetration study of P channel Power MOSFET for Low Gate Driving Application(Session B5 Si-Devices I)(2004 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices (AWAD 2004))
• High Ruggedness Power MOSFET Design by a Self-Align P+ Process(Session A7 High Power Devices)(2004 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices (AWAD 2004))
• Boron Penetration study of P channel Power MOSFET for Low Gate Driving Application(Session B5 Si-Devices I)(2004 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices (AWAD 2004))
• Boron Penetration study of P channel Power MOSFET for Low Gate Driving Application
• A Novel Power MOSFET Structure with Split P-well and Split Poly Design
• A Novel Power MOSFET Structure with Split P-well and Split Poly Design
• The Analysis of the Floating Field Limiting Ring and Field Plate(Session6: Power Devices)
• Improvement of the Leakage by Second Thermal Oxidation Process Power Trench Gate MOSFET(Session6: Power Devices)
• The Analysis of the Floating Field Limiting Ring and Field Plate(Session6: Power Devices)
• Improvement of the Leakage by Second Thermal Oxidation Process Power Trench Gate MOSFET(Session6: Power Devices)
• Low gate leakage current HEMTs by a new airbridge gate and a liquid oxidization surface (Electron devices: 第15回先端半導体デバイスの基礎と応用に関するアジア・太平洋ワークショップ(AWAD2007))
• Low gate leakage current HEMTs by a new airbridge gate and a liquid oxidization surface (Silicon devices and materials: 第15回先端半導体デバイスの基礎と応用に関するアジア・太平洋ワークショップ(AWAD2007))
• The Study of Drain Alloy Time and Temperature for Antimony Substrate Vertical High Voltage Power MOSFETs(Session 6B Power Devices,AWAD2006)
• The Study of Drain Alloy Time and Temperature for Antimony Substrate Vertical High Voltage Power MOSFETs(Session 6B Power Devices,AWAD2006)
• High ruggedness power MOSFET design by a source RTA process (Electron devices: 第15回先端半導体デバイスの基礎と応用に関するアジア・太平洋ワークショップ(AWAD2007))
• High ruggedness power MOSFET design by a source RTA process (Silicon devices and materials: 第15回先端半導体デバイスの基礎と応用に関するアジア・太平洋ワークショップ(AWAD2007))
• High performance bottom-gated poly-Si thin film transistors employing novel extended metal-pad (Electron devices: 第15回先端半導体デバイスの基礎と応用に関するアジア・太平洋ワークショップ(AWAD2007))
• High performance bottom-gated poly-Si thin film transistors employing novel extended metal-pad (Silicon devices and materials: 第15回先端半導体デバイスの基礎と応用に関するアジア・太平洋ワークショップ(AWAD2007))
• Low switching loss power MOSFET with dual gate structure (Electron devices: 第15回先端半導体デバイスの基礎と応用に関するアジア・太平洋ワークショップ(AWAD2007))
• Low switching loss power MOSFET with dual gate structure (Silicon devices and materials: 第15回先端半導体デバイスの基礎と応用に関するアジア・太平洋ワークショップ(AWAD2007))
• A Novel Power MOSFET Structure with Shallow Junction Dual Well Design(Session 6B Power Devices,AWAD2006)
• A Novel Power MOSFET Structure with Shallow Junction Dual Well Design(Session 6B Power Devices,AWAD2006)
• Study of Drain Alloy for Antimony Substrate Vertical High Voltage Power Metal Oxide Semiconductor Field Effect Transistors

もっと見る 閉じる

スポンサーリンク