Electroreflectance of Si-MOS
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概要
- 論文の詳細を見る
This paper describes the applicability of low-field electroreflectance (ER) to MOS capacitors to determine the surface properties of thermally oxidized silicon. The ER signal amplitude versus the dc gate voltage is calculated, including interface states. The flat-band voltage of the MOS structure is estimated from the ER method. This value is almost the same as that obtained from the conductance method within the experimental errors. It is shown that the relative change in reflectivity in the Si-MOS system includes not only the ER signal but also a signal possibly due to piezoreflectance ascribed to piezoelectrically active regions of the thermally grown Sin. layer. This explanation is based on our observations of piezoelectric phenomena in Si MOS capacitors fabricated by thermal oxidation technique.
- 社団法人応用物理学会の論文
- 1976-07-05
著者
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Nakai J
Department Of Electronic Engineering Faculty Of Engineering Osaka University
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Nakai Junkichi
Department Of Electronics Faculty Of Engineering Osaka University
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Nakai Junkichi
Deparimsnt Of Elecironics Facully Of Engineering Osaka University
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Moritani A
Department Of Electronic And Control System Eng. Shimane University
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Misawa Kiyotoshi
Department Of Electronics Faculty Of Engineering Osaka University
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Moritani Akihiro
Department Of Electronics Faculty Of Engineering Osaka University
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Moritani Akihiro
Department Of Electronic And Control System Eng. Shimane University
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NAKAI Junkichi
Department of Electronics, Faculty of Engineering, Osaka University
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