Kim Kinam | Advanced Technology Development 2 Team Semiconductor R&d Center Memory Division Samsung Electron

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概要

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著作論文

High Density and Ultra-Low Power Mobile SRAM Using the Novel Double S^3 (Stacked Single-crystal Silicon) Technology and KrF lithography
Self-Aligned Local Channel Implantation Using Reverse Gate Pattern for Deep Submicron Dynamic Random Access Memory Cell Transistors
Cell Transistor Design Using Self-Aligned Local Channel Implant(SALCI) for 4Gb DRAMs and Beyond
Tunnel Oxide Optimization to Improve Post-Cycling Retention of Flash Memories
Highly Reliable 256Mb NOR Flash MLC with Self-Aligned Process and Controlled Edge Profile
Ge_2Sb_2Te_5 Confined Structures and Integration of 64Mb Phase-Change Random Access Memory
Optimization of Ring Type Electrode Process for High Density PRAM
Novel Capacitor Structure Using Sidewall Spacer for Highly Reliable Ferroelectric Random Access Memory Device
Robust Three-Metallization Back End of Line Process for 0.18μm Embedded Ferroelectric Random Access Memory
Highly Reliable Ring Type Contact Scheme for High Density PRAM
Robust 2-D Stack Capacitor Technologies for 64Mb 1T1C FRAM
GST Confined Structure and Integration of 64Mb PRAM
Robust 3-Metallization BEOL Process for 0.18μm Embedded FRAM
Integration and Electrical Properties of Novel Ferroelectric Capacitors for 0.25μm 1 Transistor 1 Capacitor Ferroelectric Random Access Memory (1T1C FRAM)
Novel Capacitor Technology for Sub-Quarter Micron 1T1C FRAM
Invited Integration Technologies for High Density Emerging New Memories (先端デバイスの基礎と応用に関するアジアワークショップ(AWAD2005))
Invited Integration Technologies for High Density Emerging New Memories (先端デバイスの基礎と応用に関するアジアワークショップ(AWAD2005))
Highly Manufacturable 64M bit Ultra Low Power SRAM Using a Novel 3-Dimensional S^3 (Stacked Single-crystal Si) Cell Technology
High Density FRAM Technology

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