Effects of Rapid Thermal Annealing on Bias-Stress-Induced Base Leakage in InGaP/GaAs Collector-Up Heterojunction Bipolar Transistors Fabricated with B Ion Implantation(High-Speed HBTs and ICs,<Special Section>Heterostructure Microelectronics with TWHM2005
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概要
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The effects of rapid thermal annealing (RTA) on biasstress-induced base leakage were investigated in InGaP/GaAs collector-up heterojunction bipolar transistors (C-up HBTs) fabricated with boron ion implantation. C-up HBTs annealed at 700℃ for 1s had negligible leakage, while non-annealed C-up HBTs had leakage (with an activation energy, E_a, of 0.17eV) that exponentially increased with bias time. Because this E_a is almost the same as that of the hole traps (0.25eV) observed in the InGaP emitters of non-annealed C-up HBTs, we attribute the leakage to hole tunneling from bases to emitters. By reducing the initial trap density using RTA, we stabilized current gain even after 1,030h of testing at a junction temperature of 210℃ and a collector current density of 40kA/cm^2.
- 社団法人電子情報通信学会の論文
- 2006-07-01
著者
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Uchiyama Hiroyuki
Central Research Lab. Hitachi Ltd.
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Shiota Takashi
Hitachi Ltd. Kokubunji‐shi Jpn
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Shiota Takashi
Central Research Lab. Hitachi Ltd.
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Mochizuki Kazuhiro
Central Research Lab.hitachi Ltd.
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TANAKA Ken-ichi
Central Research Laboratory, Hitachi, Ltd.
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TANIGUCHI Takafumi
Central Research Laboratory, Hitachi, Ltd.
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Taniguchi Takafumi
Central Research Laboratory Hitachi Ltd.
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Tanaka Ken-ichi
Central Research Laboratory Hitachi Ltd.
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MOCHIZUKI Kazuhiro
Central Research Laboratory, Hitachi, Ltd.
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