High Speed Transconductance-C-Opamp Integrator Using Current-Feedback Amplifier(Building Block, <Special Section>Analog Circuit and Device Technologies)
スポンサーリンク
概要
- 論文の詳細を見る
A high-speed transconductance-C-opamp integrator using a current-feedback amplifier is proposed. The integrator has good frequency response compared with a conventional transconductance-C-opamp integrator using a voltage-feedback amplifier. The current-feedback amplifier shifts the second pole of the proposed integrator to the upper frequency. The frequency is proportional to the current gain of the current-feedback amplifier. The proposed integrator can eliminate effects of the parasitics at the output node of the transconductance since the voltage at the node is fixed. One of the circuit examples of the proposed integrator is shown. Its validity is confirmed through HSPICE simulations. The proposed integrator works as predicted up to 260 MHz.
- 社団法人電子情報通信学会の論文
- 2005-06-01
著者
-
藤井 信男
九州大学システム情報科学研究院電気電子システム工学部門
-
SATO Takahide
Graduate School of Science and Technology, Chiba University
-
Takagi S
Graduate School Of Science And Engineering Tokyo Institute Of Technology
-
Sato Takuro
Niigata Institute Of Technology
-
Sato Takahide
Graduate School Of Science And Engineering Tokyo Institute Of Technology
-
TAKAGI Shigetaka
Graduate School of Science and Engineering, Tokyo Institute of Technology
-
FUJII Nobuo
Graduate School of Science and Engineering, Tokyo Institute of Technology
-
Fujii Nobuo
Tokyo Inst. Of Technol. Tokyo Jpn
-
Takagi Shigetaka
Graduate School Of Science And Engineering Tokyo Institute Of Technology
-
Sato T
Graduate School Of Science And Engineering Tokyo Institute Of Technology
-
Fujii Nobuo
Graduate School Of Science And Engineering Tokyo Institute Of Technology
-
Takagi Shigetaka
Tokyo Inst. Of Technol. Tokyo Jpn
関連論文
- 零出力発電制動を用いたリニアレールブレーキの電源システム
- リニア誘導モータを用いた発電制動型レールブレーキシステム
- リニアレールブレーキ用電機子の設計検討
- A Nitrate Reductase Inactivator Protein from Spinach. Purification, Molecular Weight and Subunit Composition
- Isolation and molecular characterization of a SoWRKY1 transcription factor from spinach (Spinacia oleracea)
- 零出力発電制動を用いたリニアモータ型レールブレーキの励磁電源レス運転
- リニア誘導モータを応用したレールブレーキの設計と実験的検証
- Methods for Improving Efficiency of Linear Induction Motor for Urban Transit(Intemational Symposium on Speed-up and Service Technology for Railway and MAGLEV Systems)
- D702 METHODS FOR IMPROVING EFFICIENCY OF LINEAR INDUCTION MOTOR FOR URBAN TRANSIT
- リニア誘導モータの端効果の補償法について
- 空心形X-Yリニア同期モータ
- 新都市交通用リニア誘導モータの端効果補償特性
- X-Yリニア同期モータの磁束密度と推力特性
- 旅導型二次元駆動用モータの運動時の特性
- 自己回転型磁気車輸とそれを用いた試験車の特性
- 輸送用ラダー形リニア誘導モータの端効果に関する解析的検討
- 二層巻サーフェス誘導モータの静止時の特性
- 二次元駆動用サーフェス誘導モータ
- 磁気車輪の特性における二次導体壁高さの効果
- トロイダルコアを用いたサーフェス誘導モータの基本特性
- サーフェス誘導モータの電磁界解析
- 磁気車輪の磁極に関する解析的検討
- 永久磁石回転型磁気車輪の磁極と特性との関係
- 磁気車輪の電磁力分布の三次元数値計算
- FOREWORD (Special Section on Analog Technologies in Submicron Era)
- Ex vivo evidence for asymmetric tyrosine phosphorylation of ZAP-70 on double-positive thymocytes in the positive selection process
- Design of Low Power Track and Hold Circuit Based on Two Stage Structure
- Multi-Path Analog Circuits Robust to Digital Substrate Noise
- High Speed Transconductance-C-Opamp Integrator Using Current-Feedback Amplifier(Building Block, Analog Circuit and Device Technologies)
- Design Optimization of Active Shield Circuits for Digital Noise Suppression Based on Average Noise Evaluation(Analog Circuit Techniques and Related Topics)
- Equivalent Saturated MOSFET Circuit with Wide Input Range(Analog Circuit Techniques and Related Topics)
- Optimized Design of Active Shield Circuit with Consideration on On-chip Layout
- Rail-to-Rail V-I Conversion Using a Pair of Single Channel MOSFETs Operating in Plural Regions
- Extension of Current Conveyor Concept and Its Applications
- Fully On-Chip Active Guard Band Circuit for Digital Noise Cancellation(Special Section on Analog Circuit Techniques and Relate)
- Wide-Input Range Linear Voltage-to-Current Converter Using Equivalent MOSFETs without Cutoff Region(Special Section on Analog Circuit Techniques and Related Topics)
- Design Optimization of Active Guard Band Circuit with Consideration on Device Matching and Frequency Characteristic
- High PSRR Active Guard Band Circuit For Digital Noise Suppression
- A Novel Design Strategy for Class A CMOS Second Generation Current Conveyors(Special Section on Analog Circuit Techniques Supporting the System LSI Era)
- Substrate Noise Suppression Using Active Guard Band Circuit
- A BiCMOS Seventh-Order Lowpass Channel-Select Filter Operating at 2.5V Supply for a Spread-Spectrum Wireless Receiver(Special Section on Analog Circuit Techniques and Related Topics)
- Zero Common-Mode Gain Fully Balanced Circuit Structure
- Design of an All-Pass Filter using a class AB 3-Input CMOS OTA
- Integrator-Based Filter Structures with Good Frequency Characteristics
- Design of a Novel Linear 3-Input CMOS OTA and Its Application to Filter Realization
- An Area-Efficient and Highly-Linear CMOS Four-Quadrant Analog Multiplier
- CLONING AND CHARACTERIZATION OF AUXIN-RESPONSIVE ACC SYNTHASE GENES FROM MELON
- AUXIN-RESPONSE ELEMENTS IN MELON ACC SYNTHASE GENE (CMe-ACS2) PROMOTER
- CLONING AND EXPRESSION ANALYSIS OF NITRATE REDUCTASE INACTIVATOR (NRI) GENE FROM SPINACH
- The Synthesis of Ethylene in Melon Fruit during the Early Stage of Ripening : GROWTH AND DEVELOPMENT
- Intercellular Localization of Acid Invertase in Tomato Fruit and Molecular Cloning of a cDNA for the Enzyme
- Purification and Some Properties of Acid Invertase of Persimmon Fruits
- Acid Invertase of Melon Fruits : Immunochemical Detection of Acid Invertases : GROWTH AND DEVELOPMENT
- Control by Glutamine of the Synthesis of Nitrate Reductase in Cultured Spinach Cells : PROTEINS, ENZYMES AND METABOLISM
- Size and Levels of mRNA for Acid Invertase in Ripe Tomato Fruit
- Immunological Characterization of Nitrate Reductase in Different Tissues of Spinach Seedlings
- Polygalacturonase mRNA of Tomato : Size and Content in Ripe Fruits
- Cell-Free Synthesis of a Putative Precursor of Polygalacturonase in Tomato Fruits
- Effect of Heat Treatment on the Development of Polygalacturonase Activity in Tomato Fruit during Ripening
- Forward Subchannel Control Scheme for TDD Multi-Carrier Mobile Communication System (Special Section on Multi-dimensional Mobile Information Networks)
- Two Dimensional Equalization Scheme of Orthogonal Coding Multi-Carrier CDMA(Special Section of Papers Selected from ITC-CSCC'97)
- Bit Error Rate Evaluation of Delay Time Control Scheme for Reverse Channel on Orthogonal Coding Multi-Carrier CDMA (Special Section on Mutli-dimensional Mobile Information Network)
- CD45 can act as a negative regulator for the transition from early to late CD4^+ CD8^+ thymocytes
- Transcription and demethylation of TCR β gene initiate prior to the gene rearrangement in c-kit^+ thymocytes with CD3 expression: evidence of T cell commitment in the thymus
- Over Current Protection for PFM Control DC-DC Converter
- High Efficiency DC-DC Converter for Wide-ranging Loads with Gradual Reverse Current Stopping Technique
- BS-8-9 Performance Analysis of Handoff Algorithm in Multi-hop Wireless Systems(BS-8. Technology and Architecture for Ubiquitous Network Systems,ENGLISH SESSION)
- Capacitance Value Free Switched Capacitor DC-DC Voltage Converter Realizing Arbitrary Rational Conversion Ratio(Analog Circuit Techniques and Related Topics)
- Antigen Feeding Increases Frequency and Antigen-specific Proliferation Ability of Intraepithelial CD4^+ T Cells in αβ T Cell Receptor Transgenic Mice(Food & Nutrition Science)
- Reduction of Charge Injection and Current-Mismatch Errors of Charge Pump for Phase-Locked Loop
- Automatic Adjustment of Phase Locked Loop Transfer Function
- Miller Capacitor with Wide Input Range and Its Application to PLL Loop Filter(Analog Signal Processing)
- Minimization of Output Errors of FIR Digital Filters by Multiple Decompositions of Signal Word
- Evidence for down-regulation of highly expressed TCR by CD4 and CD45 on non-selected CD4^+CD8^+ thymocytes
- Reduction of Bootstrapped Switch Area Consumption Using Pre-Charge Phase
- Rail-to-Rail OTA Based on Signal Decomposition(Analog Circuit Techniques and Related Topics)
- Wide Tuning Range Voltage-Controlled Ring Oscillator(Devices and Circuits for Next Generation Multi-Media Communication Systems)
- Mapping Circuit for Rail-to-Rail Operation
- Improved CMOS Microwave Linearity Based on the Modified Large-Signal BSIM Model(Semiconductor Materials and Devices)
- Improved CMOS Microwave Linearity Based on the Modified Large-Signal BSIM Model
- New Estimation Method for Fatty Acid Composition in Oil Using Near Infrared Spectroscopy(Analytical Chemistry)
- Automated Design of Analog Circuits Accelerated by Use of Simplified MOS Model and Reuse of Genetic Operations(Analog Circuits and Related SoC Integration Technologies)
- An Unwrapping of Signals in Transform Domain and Its Application in Signal Reconstruction
- A Reassignment Method for Improved Readability of Time-Frequency Representations
- Active Shield Circuit for Digital Noise Suppression in Mixed-Signal Integrated Circuits(Analog Circuit Techniques and Related Topics)
- Reduction in Element Value Spreads on Integrator-Based Filters
- Topology-Independent Predistortion for Integrator-Based Filters (Special Section on Analog Technologies in Submicron Era)
- A Drive of Input and Output Impedance Effects of Functional Blocks into a Frequency Shift of Active Circuits
- Jitter Tolerant Continuous-Time Sigma-Delta A-D Converter Employing In-Loop Low-Pass Filter(Analog Circuit Techniques and Related Topics)
- リニア誘導モータを応用したレールブレーキの設計と実験的検証
- 零出力発電制動を用いたリニアモータ型レールブレーキの励磁電源レス運転
- Leapfrog Filters with Transmission Zeros Using OTA-C Integrator and Resistor-Based Addition Circuit
- A Rail-to-Rail CMOS Voltage Follower under Low Power Supply Voltage(Special Section on Analog Circuit Techniques Supporting the System LSI Era)
- Low Voltage OTA Using Two-MOSFET Subtractors between Rails(Special Section on Analog Circuit Techniques and Related Topics)
- Wide Dynamic Range MOS Analog Inverter (Special Issue on Circuit Technologies for Memory and Analog LSIs)
- MOSFET Instantaneous Companding Integrator(Special Section on Analog Circuit Techniques Supporting the System LSI Era)
- 低電圧低周波電流モ-ドフィルタ
- MOSFET Companding Integrator Using Higher-Order V-I Conversion
- GaAs MESFET Linearized Transconductor and Active Load with no CMFB (Special Section on Analog Circuit Techniques for System-on-Chip Integration)
- A Design of MOSFET-C Impedance Simulation Circuits Based on a GIC