Design of Low Power Track and Hold Circuit Based on Two Stage Structure
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概要
- 論文の詳細を見る
This paper proposes a low power and high speed track and hold circuit (T/H circuit) based on the two-stage structure. The proposed circuit consists of two internal T/H circuits connected in cascade. The first T/H circuit converts an input signal into a step voltage and it is applied to the following second T/H circuit which drives large load capacitors and consumes large power. Applying the step voltage to the second T/H circuit prevents the second T/H circuit from charging and discharging its load capacitor during an identical track phase and enables low power operation. Thanks to the two-stage structure the proposed T/H circuit can save 29% of the power consumption compared with the conventional one. An optimum design procedure of the proposed two stage T/H circuit is explained and its validity is confirmed by HSPICE simulations.
- （社）電子情報通信学会の論文
- 2008-06-01
著者
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藤井 信男
九州大学システム情報科学研究院電気電子システム工学部門
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SATO Takahide
Graduate School of Science and Technology, Chiba University
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Takagi S
Graduate School Of Science And Engineering Tokyo Institute Of Technology
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Sato Takuro
Niigata Institute Of Technology
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Sato Takahide
Graduate School Of Science And Engineering Tokyo Institute Of Technology
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MATSUMOTO Isamu
ROHM CO., LTD
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TAKAGI Shigetaka
Graduate School of Science and Engineering, Tokyo Institute of Technology
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FUJII Nobuo
Graduate School of Science and Engineering, Tokyo Institute of Technology
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Matsumoto Isamu
Rohm Co. Ltd
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Fujii Nobuo
Tokyo Inst. Of Technol. Tokyo Jpn
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Takagi Shigetaka
Graduate School Of Science And Engineering Tokyo Institute Of Technology
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Sato T
Graduate School Of Science And Engineering Tokyo Institute Of Technology
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Fujii Nobuo
Graduate School Of Science And Engineering Tokyo Institute Of Technology
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Takagi Shigetaka
Tokyo Inst. Of Technol. Tokyo Jpn
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