Design of a Novel Linear 3-Input CMOS OTA and Its Application to Filter Realization
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概要
- 論文の詳細を見る
A novel voltage-tunable linear 3-input CMOS Operational Transconductance A mplifier (OTA) suitable for onchip integration of advanced monolithic systems is proposed. When a 3-input OTA is needed, a conventional 3-input OTA uses two 2-input OTA's and either grounds one of the 4 input terminals or ties two terminals. This paper presents a method to reduce the number of MOS transistors and to save chip area by designing a 3-input OTA directly. A CMOS pair technique is introduced as a solution to minimize a matching problem for control voltage sources. Simulation results show that the active chip area of the proposed 3-input OTA is reduced by 25% compared to that of a conventional one. The proposed 3-input OTA is applied to a realization of an OTA-C filter to verify the effectiveness.
- 社団法人電子情報通信学会の論文
- 1997-12-25
著者
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Takagi S
Graduate School Of Science And Engineering Tokyo Institute Of Technology
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Sato Takuro
Niigata Institute Of Technology
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FUJII Nobuo
Department of Electrical and Electronic Systems Engineering, Faculty of Information Science and Elec
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TAKAGI Shigetaka
Department of Communications and Integrated Systems, Graduate School of Science and Engineering, Tok
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JEONG Moonjae
Department of Physical Electronics, Tokyo Institute of Technology
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CZARNUL Zdzislaw
TOSHIBA CORPORATION
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Jeong Moonjae
The Department Of Physical Electronics Tokyo Institute Of Technology
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Sato T
Graduate School Of Science And Engineering Tokyo Institute Of Technology
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Czarnul Z
Toshiba Corp. Kawasaki‐shi Jpn
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Takagi Shigetaka
Department Of Communications And Integrated Systems Graduate School Of Science And Engineering Tokyo
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Fujii Nobuo
Department Of Civil Engineering
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Takagi Shigetaka
Tokyo Inst. Of Technol. Tokyo Jpn
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